{"title":"Effect of Photo Misalignment on N-LDMOS Hot Carrier Device Reliability","authors":"D. Brisbin, P. Lindorfer, P. Chaparala","doi":"10.1109/IRWS.2006.305208","DOIUrl":null,"url":null,"abstract":"Power management devices often require operation in the 20 V to 30 V range. A common choice for the power MOS driver is an n-channel lateral DMOS (N-LDMOS) device. An advantage of N-LDMOS device is that it can easily be integrated within existing technologies to handle a wide range of operating voltages without significant process changes. Because of the high voltages applied to the N-LDMOS device hot carrier (HC) degradation is a real reliability concern. In high power applications N-LDMOS devices are often implemented in transistor arrays where the basic cell is a dual gate single drain device. This paper focuses on understanding unusual N-LDMOS HC results in which single gate devices had significantly better HC performance than dual gate devices","PeriodicalId":199223,"journal":{"name":"2006 IEEE International Integrated Reliability Workshop Final Report","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Integrated Reliability Workshop Final Report","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRWS.2006.305208","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Power management devices often require operation in the 20 V to 30 V range. A common choice for the power MOS driver is an n-channel lateral DMOS (N-LDMOS) device. An advantage of N-LDMOS device is that it can easily be integrated within existing technologies to handle a wide range of operating voltages without significant process changes. Because of the high voltages applied to the N-LDMOS device hot carrier (HC) degradation is a real reliability concern. In high power applications N-LDMOS devices are often implemented in transistor arrays where the basic cell is a dual gate single drain device. This paper focuses on understanding unusual N-LDMOS HC results in which single gate devices had significantly better HC performance than dual gate devices