{"title":"Random Access Analog Memory (RA2M) for Video Signal Application","authors":"Nilanjan Chattaraj, A. Dhar","doi":"10.1109/VLSID.2012.43","DOIUrl":null,"url":null,"abstract":"This paper proposes a novel memory architecture, introducing Random Access Analog Memory (RA2M), to store unquantized samples of video signal of maximum 5 MHz bandwidth for storing time duration in order of millisecond by implementing periodic memory refreshing mechanism in it. At 16.5 MHz sampling frequency with 25 frames/s frame rate, this implemented design can store voltage signal sample of up to 200 mV for 40 ms with 8 bit resolution. The proposed architecture contains unit RA2M cell of 250 fF capacitance occupying 21 μm × 21 μm area with 4.1 mW average power dissipation per cell in 0.18 μm standard CMOS fabrication process. The improvement in signal storage time duration into analog memory by introducing periodic memory refreshing mechanism in voltage mode is implemented for the first time. The circuit implementation is based on switched capacitor technique and is compatible with conventional fabrication process. This architecture facilitates random location data accessibility and includes common mode noise rejection by its differential signal implementation.","PeriodicalId":405021,"journal":{"name":"2012 25th International Conference on VLSI Design","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-01-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 25th International Conference on VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSID.2012.43","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper proposes a novel memory architecture, introducing Random Access Analog Memory (RA2M), to store unquantized samples of video signal of maximum 5 MHz bandwidth for storing time duration in order of millisecond by implementing periodic memory refreshing mechanism in it. At 16.5 MHz sampling frequency with 25 frames/s frame rate, this implemented design can store voltage signal sample of up to 200 mV for 40 ms with 8 bit resolution. The proposed architecture contains unit RA2M cell of 250 fF capacitance occupying 21 μm × 21 μm area with 4.1 mW average power dissipation per cell in 0.18 μm standard CMOS fabrication process. The improvement in signal storage time duration into analog memory by introducing periodic memory refreshing mechanism in voltage mode is implemented for the first time. The circuit implementation is based on switched capacitor technique and is compatible with conventional fabrication process. This architecture facilitates random location data accessibility and includes common mode noise rejection by its differential signal implementation.