A frequency synthesizer for Mode-1 MB-OFDM UWB applications

Jung-Yu Chang, Che-Wei Fan, Shen-Iuan Liu
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引用次数: 5

Abstract

A frequency synthesizer for Mode-1 MB-OFDM UWB applications is realized in 65nm CMOS. By using a delay-locked loop (DLL) and the proposed multiply-by-two circuit, the frequency synthesizer achieves the in-band spur of −40dBc for the three-band operation. The proposed multiply-by-2 circuit realizes the quadrature signals, and its input signals do not need the 50% duty cycle. A modified current-starving cell in a DLL is also proposed to reduce the supply noise sensitivity. The measured switching time from 3.342GHz to 4.488GHz is around 1.1ns. The area is 1.25×1.175mm2 with pads and the power is 19.2mW for 1.2V supply.
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频率合成器的模式1 MB-OFDM UWB应用
在65nm CMOS上实现了一种适用于Mode-1 MB-OFDM UWB应用的频率合成器。该频率合成器采用锁延环(DLL)和乘二电路,实现了−40dBc的带内杂散。所提出的乘2电路实现了正交信号,其输入信号不需要50%占空比。为了降低电源噪声的灵敏度,还提出了一种改进的缺流单元。从3.342GHz到4.488GHz的切换时间约为1.1ns。面积为1.25×1.175mm2,带衬垫,1.2V供电,功率为19.2mW。
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