Laser defect correction applications to FPGA based custom computers

G. Chapman, B. Dufort
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Abstract

The complexity and speed of monolithic FPGA based custom computers has been set by the presence of defective sections which limit chip area. Test FPGAs show that laser link defect avoidance routing around flawed blocks generates delays <50% of active switches, making the error cell distribution nearly invisible.
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激光缺陷校正在基于FPGA的定制计算机中的应用
基于单片FPGA的定制计算机的复杂度和速度取决于缺陷部分的存在,缺陷部分限制了芯片的面积。测试fpga表明,围绕有缺陷块的激光链路缺陷避免路由产生的延迟<50%的有源开关,使误差单元分布几乎不可见。
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Increased FPGA capacity enables scalable, flexible CCMs: an example from image processing Fault simulation on reconfigurable hardware Computing kernels implemented with a wormhole RTR CCM Datapath-oriented FPGA mapping and placement for configurable computing A dynamic reconfiguration run-time system
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