A 1.6–2.6GHz 29dBm injection-locked power amplifier with 64% peak PAE in 65nm CMOS

J. Lindstrand, C. Bryant, Markus Törmänen, H. Sjöland
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引用次数: 9

Abstract

This paper presents a wideband CMOS power amplifier intended for cellular handset applications. The circuit exploits injection locking to achieve a power gain of 20.5dB from a single stage amplifier. The maximum output power of 29dBm, with a peak drain- and power-added-efficiency (PAE) of 66% and 64%, respectively, occurs at a center frequency of 2GHz with a 3V supply. A cross-coupled cascode topology enables a wideband PAE exceeding 50% from 1.6 to 2.6GHz. For output power levels below 4dBm the circuit operates as a linear class AB amplifier with a power consumption of 17mW from a 0.48V supply. The power gain of 20.5dB is kept constant for all output powers; with an AM-AM- and AM-PM-conversion of 0.2dB and 17deg, respectively, over the entire WCDMA dynamic range of 80dB. The circuit is implemented in a standard 65nm CMOS process with a total chip area of 0.52×0.48mm2 including pads.
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1.6-2.6GHz 29dBm注入锁定功率放大器,峰值PAE为64%,采用65nm CMOS
本文提出了一种适用于手机应用的宽带CMOS功率放大器。该电路利用注入锁定从单级放大器获得20.5dB的功率增益。当中心频率为2GHz,电源电压为3V时,最大输出功率为29dBm,峰值漏极和功率附加效率(PAE)分别为66%和64%。交叉耦合级联码拓扑使1.6 ~ 2.6GHz的宽带PAE超过50%。对于低于4dBm的输出功率水平,电路作为线性AB类放大器工作,功耗为17mW,来自0.48V电源。所有输出功率均保持20.5dB的功率增益不变;在整个80dB的WCDMA动态范围内,AM-AM-和am - pm -转换分别为0.2dB和17度。该电路采用标准的65nm CMOS工艺实现,包括焊片在内的总芯片面积为0.52×0.48mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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