Sub-threshold novel driving techniques of low leakage and high SNM SRAM architecture for high computational design

T. V. Reddy, K. Rao, P. K. Reddy, T. Keerthi, P. A. Rani
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Abstract

As technology is increasing day by day, customers are expecting high-performance and low-power devices. Though many researchers are working under sub threshold operation still there is a demand for low-power circuits working under sub threshold or near threshold by reducing leakage power. There triggers a need for low power high computational speed and performance. Therefore there is a demand for circuit design that operates under the threshold region. Though low-power circuit designs are attractive, the limiting factor involved here is leakage power when the circuit is operating under sub-threshold operation. However, this logic is more sensitive to temperature, process variations, and the supply voltage as current is exponentially related to voltage in the sub-threshold region. i.e. (Vgs
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面向高计算设计的低泄漏和高SNM SRAM结构的亚阈值新型驱动技术
随着技术的日益发展,客户对高性能和低功耗设备的期望越来越高。虽然许多研究人员都在亚阈值下工作,但仍然需要通过降低泄漏功率来实现在亚阈值或近阈值下工作的低功耗电路。这引发了对低功耗、高计算速度和性能的需求。因此,需要在阈值区域下工作的电路设计。虽然低功耗电路设计很有吸引力,但这里涉及的限制因素是电路在亚阈值操作下工作时的泄漏功率。然而,这种逻辑对温度、工艺变化和电源电压更敏感,因为电流与亚阈值区域的电压呈指数相关。例如(vg < Vth)。本文提出的新设计技术是源耦合逻辑和GDI SRAM,用于评估SRAM设计的功能和性能。一些应用,如起搏器和手表评估特定的生物医学应用的健康状况。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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