{"title":"Implementation of VLSI-oriented FELICS algorithm using Pseudo Dual-Port RAM","authors":"M. Rejusha, K. Jayanthi","doi":"10.1109/ICPRIME.2012.6208289","DOIUrl":null,"url":null,"abstract":"This paper presents a fast, efficient, lossless image compression algorithm named FELICS. This consists of two techniques named simplified adjusted binary code and GOLOMB-Rice code which provide lossless compression for high throughput applications. Two-level parallelism with four-stage pipelining is adopted. Pseudo Dual-Port RAM is used which improves the processing speed and decreases area and power consumption. The proposed architecture can be used for high definition display applications.","PeriodicalId":148511,"journal":{"name":"International Conference on Pattern Recognition, Informatics and Medical Engineering (PRIME-2012)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Pattern Recognition, Informatics and Medical Engineering (PRIME-2012)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICPRIME.2012.6208289","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents a fast, efficient, lossless image compression algorithm named FELICS. This consists of two techniques named simplified adjusted binary code and GOLOMB-Rice code which provide lossless compression for high throughput applications. Two-level parallelism with four-stage pipelining is adopted. Pseudo Dual-Port RAM is used which improves the processing speed and decreases area and power consumption. The proposed architecture can be used for high definition display applications.