Design and implementation of precise measuring method for the access time of embedded memory

Abstract

With the development of semiconductor process technology and circuit design capabilities, the operating frequency of random access memory has been improved dramatically. How to accurately measure the memory random access time especially to measure the random access time of low density embedded memory has encounter so many challenges. The traditional timing measurement method which connects the external ports directly to the internal ports of memory is not feasible since it is of very low efficiency and very low precision. A new method which applies the built-in test circuit to measure embedded memory access time is presented in this paper. Based on 28nm logic process high speed SRAM test chip design as an example, this paper introduces a new timing measuring method as well as circuit design.