An efficient algorithm for pointer-to-array access conversion for compiling and optimizing DSP applications

Robert A. van Engelen, K. Gallivan
{"title":"An efficient algorithm for pointer-to-array access conversion for compiling and optimizing DSP applications","authors":"Robert A. van Engelen, K. Gallivan","doi":"10.1109/IWIA.2001.955200","DOIUrl":null,"url":null,"abstract":"The complexity of Digital Signal Processing (DSP) applications has been steadily increasing due to advances in hardware design for embedded processors. To meet critical power consumption and timing constraints, many DSP applications are hand-coded in assembly. Because the cost of hand-coding is becoming prohibitive for developing an embedded system, there is a trend toward the use of high-level programming languages, particularly C, and the use of optimizing compilers for software development. Consequently, more than ever there is a need for compilers to optimize DSP application to make effective use of the available hardware resources. Existing DSP codes are often riddled with pointer-based data accesses, because DSP programmers have the mistaken belief that a compiler will always generate better target code. The use of extensive pointer arithmetic makes analysis and optimization difficult for compilers for modern DSPs with regular architectures and large homogeneous registers sets. In this paper, we present a novel algorithm for converting pointer-based code to code with explicit array accesses. The conversion enables a compiler to perform data flow analysis and loop optimizations on DSP codes.","PeriodicalId":388942,"journal":{"name":"2001 Innovative Architecture for Future Generation High-Performance Processors and Systems","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"28","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2001 Innovative Architecture for Future Generation High-Performance Processors and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWIA.2001.955200","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 28

Abstract

The complexity of Digital Signal Processing (DSP) applications has been steadily increasing due to advances in hardware design for embedded processors. To meet critical power consumption and timing constraints, many DSP applications are hand-coded in assembly. Because the cost of hand-coding is becoming prohibitive for developing an embedded system, there is a trend toward the use of high-level programming languages, particularly C, and the use of optimizing compilers for software development. Consequently, more than ever there is a need for compilers to optimize DSP application to make effective use of the available hardware resources. Existing DSP codes are often riddled with pointer-based data accesses, because DSP programmers have the mistaken belief that a compiler will always generate better target code. The use of extensive pointer arithmetic makes analysis and optimization difficult for compilers for modern DSPs with regular architectures and large homogeneous registers sets. In this paper, we present a novel algorithm for converting pointer-based code to code with explicit array accesses. The conversion enables a compiler to perform data flow analysis and loop optimizations on DSP codes.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
一种用于编译和优化DSP应用程序的指针到数组访问转换的有效算法
由于嵌入式处理器硬件设计的进步,数字信号处理(DSP)应用的复杂性一直在稳步增加。为了满足关键的功耗和时间限制,许多DSP应用程序都是用汇编手工编码的。由于开发嵌入式系统的手工编码成本越来越高,因此有一种趋势是使用高级编程语言,特别是C语言,并使用优化编译器进行软件开发。因此,编译器比以往任何时候都更需要优化DSP应用程序,以有效利用可用的硬件资源。现有的DSP代码常常充斥着基于指针的数据访问,因为DSP程序员错误地认为编译器总能生成更好的目标代码。广泛的指针算法的使用使得具有常规架构和大型同构寄存器集的现代dsp的编译器难以分析和优化。在本文中,我们提出了一种将基于指针的代码转换为具有显式数组访问的代码的新算法。这种转换使编译器能够在DSP代码上执行数据流分析和循环优化。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Power efficient instruction cache for wide-issue processors Cache-In-Memory An approach towards an analytical characterization of locality and its portability Pipelined memory hierarchies: scalable organizations and application performance Wrapped system call in communication and execution fusion OS: CEFOS
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1