Model checking of real-time systems using rewriting logic

Abstract

With the fast development of IT industry, our reliance on the functioning of software systems is growing rapidly. These systems are becoming more and more complicated and are massively encroaching on daily life, e.g., the Internet, embedded systems, mobile devices and so on. The design and verification of concurrent and real-time systems are notoriously difficult problems. Among the software validation techniques, model checking approach has been proved to be successful as an automatic and effective solution. In this paper, we propose a methodology for the modeling and verification of the Real-Time and Hybrid Systems. The Real-Time Maude tool has been used to formally model, simulate, and model check real-time and hybrid systems. This paper also shows via a case study how Real-Time Maude search analysis found a previously unknown behavior that led to missed deadlines. First, the case study is modeled using timed and/or hybrid automata and then SysML's state machine diagram is described, for allowing more precise specification. The specified model is verified against specified LTL properties using Maude LTL Model Checker.