Impact analysis of performance faults in modern microprocessors

Naghmeh Karimi, M. Maniatakos, C. Tirumurti, A. Jas, Y. Makris
{"title":"Impact analysis of performance faults in modern microprocessors","authors":"Naghmeh Karimi, M. Maniatakos, C. Tirumurti, A. Jas, Y. Makris","doi":"10.1109/ICCD.2009.5413171","DOIUrl":null,"url":null,"abstract":"Towards improving performance, modern microprocessors incorporate a variety of architectural features, such as branch prediction and speculative execution, which are not critical to the correctness of their operation. While faults in the corresponding hardware may not necessarily affect functional correctness, they may, nevertheless, adversely impact performance. In this paper, we investigate quantitatively the performance impact of such faults using a superscalar, dynamically-scheduled, out-of-order, Alpha-like microprocessor, on which we execute SPEC2000 integer benchmarks. We provide extensive fault simulation-based experimental results and we discuss how this information may guide the inclusion of additional hardware for performance loss recovery and yield enhancement.","PeriodicalId":256908,"journal":{"name":"2009 IEEE International Conference on Computer Design","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE International Conference on Computer Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.2009.5413171","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

Towards improving performance, modern microprocessors incorporate a variety of architectural features, such as branch prediction and speculative execution, which are not critical to the correctness of their operation. While faults in the corresponding hardware may not necessarily affect functional correctness, they may, nevertheless, adversely impact performance. In this paper, we investigate quantitatively the performance impact of such faults using a superscalar, dynamically-scheduled, out-of-order, Alpha-like microprocessor, on which we execute SPEC2000 integer benchmarks. We provide extensive fault simulation-based experimental results and we discuss how this information may guide the inclusion of additional hardware for performance loss recovery and yield enhancement.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
现代微处理器性能故障的影响分析
为了提高性能,现代微处理器结合了各种体系结构特征,例如分支预测和推测执行,这些对其操作的正确性并不重要。虽然相应硬件中的故障不一定会影响功能的正确性,但它们可能会对性能产生不利影响。在本文中,我们使用一个超标量的、动态调度的、乱序的、类似alpha的微处理器,在其上执行SPEC2000整数基准测试,定量地研究了这些故障对性能的影响。我们提供了广泛的基于故障模拟的实验结果,并讨论了这些信息如何指导包含额外的硬件以恢复性能损失和提高产量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Empirical performance models for 3T1D memories A novel SoC architecture on FPGA for ultra fast face detection A Technology-Agnostic Simulation Environment (TASE) for iterative custom IC design across processes Low-overhead error detection for Networks-on-Chip Interconnect performance corners considering crosstalk noise
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1