A test structure for characterization of CMOS APS

T. Elkhatib, S. Moussa, H. Ragaie, H. Haddara
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引用次数: 2

Abstract

A test structure to characterize CMOS APS image sensor is presented. Individual photodiodes and pixels as well as an image sensor array of 64/spl times/64 active pixels with selectable linear or logarithmic operation modes are designed. A test chip includes these features in addition to on-chip timing and control digital circuits as well as correlated double sampling have been built on a 0.6 /spl mu/m CMOS process. The test methodology and preliminary simulation results are presented.
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一种用于CMOS APS表征的测试结构
提出了一种CMOS APS图像传感器的测试结构。设计了单独的光电二极管和像素以及64/spl倍/64个有源像素的图像传感器阵列,具有可选的线性或对数操作模式。除了片上时序和控制数字电路以及相关双采样外,测试芯片还包括这些功能,这些功能已建立在0.6 /spl μ m CMOS工艺上。给出了试验方法和初步仿真结果。
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