{"title":"Programmable PWM modulator optimized for high speed for OPWM test platform","authors":"J. Kubák, J. Stastný, P. Kujan","doi":"10.1109/AE.2014.7011690","DOIUrl":null,"url":null,"abstract":"Optimal Pulse Width Modulation (OPWM) is an established technique to generate PWM waveforms with low base-band distortion. The technique requires fast PWM generator to minimize base-band distortion. The aim of this paper is to present a programmable PWM modulator optimized for high speed satisfying the OPWM technique demands. The PWM modulator stores pulse sequence data in an internal memory which is facilitated by SDRAM memory. The design was implemented on Register Transfer Level (RTL) using VHDL language. The design verification was conducted on both RTL and gate levels as well as tested on two development boards.","PeriodicalId":149779,"journal":{"name":"2014 International Conference on Applied Electronics","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Conference on Applied Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AE.2014.7011690","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Optimal Pulse Width Modulation (OPWM) is an established technique to generate PWM waveforms with low base-band distortion. The technique requires fast PWM generator to minimize base-band distortion. The aim of this paper is to present a programmable PWM modulator optimized for high speed satisfying the OPWM technique demands. The PWM modulator stores pulse sequence data in an internal memory which is facilitated by SDRAM memory. The design was implemented on Register Transfer Level (RTL) using VHDL language. The design verification was conducted on both RTL and gate levels as well as tested on two development boards.