D. Worledge, C. Safranski, G. Hu, J. Sun, P. Hashemi, S. Brown, L. Buzi, C. D'Emic, M. Gottwald, O. Gunawan, H. Jung, S. Karimeddiny, J. Kim, P. Trouilloud
{"title":"STT-MRAM - Status and Outlook","authors":"D. Worledge, C. Safranski, G. Hu, J. Sun, P. Hashemi, S. Brown, L. Buzi, C. D'Emic, M. Gottwald, O. Gunawan, H. Jung, S. Karimeddiny, J. Kim, P. Trouilloud","doi":"10.1109/TMRC56419.2022.9918607","DOIUrl":null,"url":null,"abstract":"We review the use-case and requirements for Spin-Transfer-Torque MRAM (STT-MRAM) to replace SRAM in last-level-cache. We then describe recent work on double magnetic tunnel junctions and double spin-torque magnetic tunnel junctions to reduce the MRAM switching current. The latter devices open up the possibility of reducing the switching current by a factor of two while maintaining high magnetoresistance, which could enable the use of STT-MRAM in last-level-cache.","PeriodicalId":432413,"journal":{"name":"2022 IEEE 33rd Magnetic Recording Conference (TMRC)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 33rd Magnetic Recording Conference (TMRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TMRC56419.2022.9918607","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
We review the use-case and requirements for Spin-Transfer-Torque MRAM (STT-MRAM) to replace SRAM in last-level-cache. We then describe recent work on double magnetic tunnel junctions and double spin-torque magnetic tunnel junctions to reduce the MRAM switching current. The latter devices open up the possibility of reducing the switching current by a factor of two while maintaining high magnetoresistance, which could enable the use of STT-MRAM in last-level-cache.
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