{"title":"A New High Resolution Frequency and Phase Synthesis Method based on `Flying-Adder' Architecture","authors":"H. Gharaee, E. Tathesari","doi":"10.1109/SMELEC.2006.380684","DOIUrl":null,"url":null,"abstract":"High speed electronic systems demand frequency synthesizer of high resolution, wide bandwidth and fast switching speed. The \"Flying-Adder\" architecture is a frequency and phase synthesis technique that is based on a VCO of multiple delay stages. This Flying-Adder is implemented in Quartus software which its result shows that the highest frequency is about 83 MHz, when VCO oscillates at 5.2 MHz. In some cases, this architecture has a barrier of inherent jitter on the output frequency. In this brief, a new method is proposed for eliminating such jitter problem. This method is caused to achieve exact phase and frequency. This design is implemented in Quartus software with EP1K30QC208-1 device from ACEX IK series. When VCO is running at 0.651-10 MHz high resolution output frequency is achieved.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Conference on Semiconductor Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.2006.380684","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
High speed electronic systems demand frequency synthesizer of high resolution, wide bandwidth and fast switching speed. The "Flying-Adder" architecture is a frequency and phase synthesis technique that is based on a VCO of multiple delay stages. This Flying-Adder is implemented in Quartus software which its result shows that the highest frequency is about 83 MHz, when VCO oscillates at 5.2 MHz. In some cases, this architecture has a barrier of inherent jitter on the output frequency. In this brief, a new method is proposed for eliminating such jitter problem. This method is caused to achieve exact phase and frequency. This design is implemented in Quartus software with EP1K30QC208-1 device from ACEX IK series. When VCO is running at 0.651-10 MHz high resolution output frequency is achieved.