Hierarchical test approach using boundary scan test

Abstract

With integration and miniaturization of electronic components, physical access to the boundary of the components on a printed circuit board or system is almost impossible. The IEEE 1149.1 and the boundary scan test have evolved to meet this challenge by electronically accessing the component boundary. In this paper, application of boundary scan test techniques at different levels of digital systems is discussed. Test generation for different interconnection faults on printed circuit boards and test application through the standard test access port is considered. Acceptance and potential capabilities of the method are presented.