{"title":"Design and simulation of CMOS LNA for down converting sigma-detla ADC for reconfigurable RF receiver","authors":"B. Tasadduq","doi":"10.1109/ICSENGT.2011.5993413","DOIUrl":null,"url":null,"abstract":"In this paper, we propose simulation results of a wideband Low noise amplifier(LNA) for down converting sigma-delta A/D converter for reconfigurable RF receiver architecture [1]. The proposed LNA is designed for frequency range of 1.7GHz to 10GHz providing a gain of 7.5–9.766 dB, noise figure of 1.454–5.166dB, input matching of −5.77 to −23.8 dB, IIP3 and P1dB of 6.7dBm and 17.2dBm and stability over the entire frequency spectrum. The power dissipation is 7.404mW from 1.5V supply. The simulations are performed on Cadence RF specter.","PeriodicalId":346890,"journal":{"name":"2011 IEEE International Conference on System Engineering and Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International Conference on System Engineering and Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSENGT.2011.5993413","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, we propose simulation results of a wideband Low noise amplifier(LNA) for down converting sigma-delta A/D converter for reconfigurable RF receiver architecture [1]. The proposed LNA is designed for frequency range of 1.7GHz to 10GHz providing a gain of 7.5–9.766 dB, noise figure of 1.454–5.166dB, input matching of −5.77 to −23.8 dB, IIP3 and P1dB of 6.7dBm and 17.2dBm and stability over the entire frequency spectrum. The power dissipation is 7.404mW from 1.5V supply. The simulations are performed on Cadence RF specter.
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