Adaptively biased two-stage amplifier

Abstract

An adaptively biased amplifier and an adaptive biasing block with almost supply independent behavior are described. Bias currents of the amplifier are adjusted by sensing the input signal amplitude. This adjustment together with a time dependency added to the biasing network causes the adaptively biased amplifier to have approximately the same bandwidth and the same relative stability for large signals as its linear counterpart biased with much higher currents. Simulation results in a 0.35/spl mu/m CMOS process show that in this way significant power reduction can be achieved, especially in applications where load capacitance is large.