{"title":"A 50Mb/s CMOS optical data link receiver integrated circuit","authors":"J. Steininger, E. Swanson","doi":"10.1109/ISSCC.1986.1156874","DOIUrl":null,"url":null,"abstract":"This report will cover an optical data link circuit designed in a 1.5μm CMOS technology. Operation is from 1Mb/s to 50Mb/s with a 60dB dynamic range: input currents are as low as 100nA rms. The chip requires a single 5V power supply and internally generates a bias voltage for the PIN diode.","PeriodicalId":440688,"journal":{"name":"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1986.1156874","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This report will cover an optical data link circuit designed in a 1.5μm CMOS technology. Operation is from 1Mb/s to 50Mb/s with a 60dB dynamic range: input currents are as low as 100nA rms. The chip requires a single 5V power supply and internally generates a bias voltage for the PIN diode.
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