Implementation of Ambipolar CNTFET based logic gates and their performance comparison with CNTFET and CMOS based logic gates

Abstract

Challenges faced by the MOSFETs by scaling down further and further has led to the consideration of novel device (Ambipolar CNTFET) in which channel is intrinsic and has Schottky barrier contacts. Ambipolar CNTFET has back gate which can control the polarity of the device. This in field polarity control can make efficient reconfigurable logic circuits. This work presents the implementation of Ambipolar CNTFET based logic gates such as Inverter, NOR and NAND Gate and extracted different performance parameters such as average power, delay and power delay product and compared it with the conventional CNTFET and CMOS technology. The results show reduction in delay of Ambipolar CNTFET based NOR and NAND gate in comparison to CMOS NOR and NAND gate by 15.48% and 76.93% respectively. An Ambipolar CNTFET is modelled by a circuit consisting of two CNTFETs and two inverters. All the simulation are performed using HSPICE software at 32nm technology node.