M. Croce, Brian W. Friend, F. Nesta, L. Crespi, P. Malcovati, A. Baschirotto
{"title":"A 760 nW, 180 nm CMOS Analog Voice Activity Detection System","authors":"M. Croce, Brian W. Friend, F. Nesta, L. Crespi, P. Malcovati, A. Baschirotto","doi":"10.1109/CICC48029.2020.9075954","DOIUrl":null,"url":null,"abstract":"This paper presents a fully analog, signal-to-noise ratio (SNR) based voice-activity detection circuit, which achieves 99.5 % classification accuracy in a domestic environment in the presence of loud ambient noise, consuming 760 nW from a 1.2 V supply. The circuit exploits an energy-efficient analog implementation with continuous-time non-linear operation and fully-passive switched-capacitor processing, to minimize both the power consumption and the chip area. The VAD circuit prototype, fabricated in a 180 nm CMOS technology, occupies 0.14mm2.","PeriodicalId":409525,"journal":{"name":"2020 IEEE Custom Integrated Circuits Conference (CICC)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Custom Integrated Circuits Conference (CICC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC48029.2020.9075954","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a fully analog, signal-to-noise ratio (SNR) based voice-activity detection circuit, which achieves 99.5 % classification accuracy in a domestic environment in the presence of loud ambient noise, consuming 760 nW from a 1.2 V supply. The circuit exploits an energy-efficient analog implementation with continuous-time non-linear operation and fully-passive switched-capacitor processing, to minimize both the power consumption and the chip area. The VAD circuit prototype, fabricated in a 180 nm CMOS technology, occupies 0.14mm2.