Bridging Validation and Automatic Test Equipment (ATE) Environment

Abstract

For getting high quality complex SoCs in market well in time requires many cross functional teams to work in tandem. One of the areas which we are focusing in this paper is collaboration between Validation and ATE teams. Validation needs to give production functional patterns to ATE to qualify the chip in mass production. These tests may be speed hunted patterns for Powerpc core or complex pattern for various IPs. Porting of validation testcases to ATE is a significant task and requires Logic Analyzer to capture signals. This causes significant delay in generating production ATE patterns. In this paper, we propose a new methodology where using scripts we can convert a validation test to ATE compatible testcase. One of the main advantage of this flow is that for pattern generation, there is no need to run the testcase either in simulation/emulation or to capture signals using Logic Analyzer. This flow also brings in a lot of debug capabilities and same test can be run across emulation, simulation, ATE and validation board. The new approach helps customer debug where customer failing scenarios can be converted into ATE patterns in matter of seconds.