200 Mbit/s 4-symbol arithmetic encoder architecture for embedded zero tree-based compression

R. Osorio, B. Vanhoof
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引用次数: 1

Abstract

In state-of-the-art multimedia compression standards, arithmetic coding is widely used as a powerful entropy compression method. In the MPEG-4 standard a specific 4-symbol, multiple-context arithmetic coder is used for wavelet based image compression. We present an architecture capable of processing close to 1 symbol per cycle, managing a multiple context in a simple, yet cost-efficient manner. A peak performance of 200 Mbit/s is achieved when clocking this architecture at 100 MHz.
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用于嵌入式零树压缩的200mbit /s 4符号算术编码器结构
在当前的多媒体压缩标准中,算术编码作为一种强大的熵压缩方法被广泛采用。在MPEG-4标准中,一种特定的4符号多上下文算术编码器用于基于小波的图像压缩。我们提出了一个架构,每个周期能够处理接近1个符号,以一种简单而经济高效的方式管理多个上下文。当该架构的时钟频率为100mhz时,峰值性能可达200mbit /s。
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