{"title":"PIMM1, an image processing ASIC based on mathematical morphology","authors":"J. Klein, R. Peyrard","doi":"10.1109/ASIC.1989.123209","DOIUrl":null,"url":null,"abstract":"To meet image analysis requirements in terms of processing speed and computing capacities, the authors have developed an ASIC (application-specific integrated circuit) with a programmable architecture, supporting the latest algorithms of mathematical morphology. Designed in 1.5- mu m CMOS technology, the ASIC can process 8-b images at a 20-MHz pixel frequency, in pipeline or in parallel. The architecture of PIMM1 is discussed, along with two multiprocessor organizations.<<ETX>>","PeriodicalId":245997,"journal":{"name":"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-09-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1989.123209","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15
Abstract
To meet image analysis requirements in terms of processing speed and computing capacities, the authors have developed an ASIC (application-specific integrated circuit) with a programmable architecture, supporting the latest algorithms of mathematical morphology. Designed in 1.5- mu m CMOS technology, the ASIC can process 8-b images at a 20-MHz pixel frequency, in pipeline or in parallel. The architecture of PIMM1 is discussed, along with two multiprocessor organizations.<>
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