An SoC based HW/SW co-design architecture for multi-standard audio decoding

Dajiang Zhou, Peilin Liu, Ji Kong, Yunfei Zhang, Bin He, Ning Deng
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引用次数: 14

Abstract

In this paper, we presented an SoC based HW/SW co-design architecture for multi-standard audio decoding. It is developed to support the audio standards of AAC LC profile, Dolby AC3, Ogg Vorbis, MPEG-1 Layer 3 (MP3) and Windows Media Audio (WMA). A VLSI reconfigurable filterbank based on CORDIC algorithm is developed to accelerate the multi-standard decoding process. We designed and implemented an SoC platform to verify the interbank as an IP core. Experimental result shows that the architecture is able to perform real-time audio decoding at low frequency (typically 10.6MHz for AAC and 11.3 MHz for MP3) and the implementation cost is low (44.3k gates, 34k bytes RAM and 45k bytes data ROM for 5 audio standards). The architecture is also flexible for extending support of new formats and standards.
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基于SoC的多标准音频解码硬件/软件协同设计架构
本文提出了一种基于SoC的多标准音频解码硬件/软件协同设计架构。它支持AAC LC配置文件、杜比AC3、Ogg Vorbis、MPEG-1 Layer 3 (MP3)和Windows Media audio (WMA)音频标准。为了加快多标准解码的速度,提出了一种基于CORDIC算法的超大规模集成电路可重构滤波器组。我们设计并实现了一个SoC平台来验证银行间的IP核。实验结果表明,该架构能够在低频率(AAC为10.6MHz, MP3为11.3 MHz)下进行实时音频解码,实现成本低(5种音频标准的44.3k门、34k字节RAM和45k字节数据ROM)。该体系结构在扩展对新格式和标准的支持方面也很灵活。
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