VHDL - AMS modeling of silicon carbide power semiconductor devices

Abstract

VHDL-AMS is gaining ground as the standard modeling language for devices and systems. A new modeling tool, Paragon, is presented in this work that helps the user to create models with only the topology and the characteristic equations. Paragon then generates the model in various HDLs such as VHDL-AMS, MAST and Verilog-A. As an example, a silicon carbide vertical JFET/SIT is modeled using Paragon. SiC JFETs are power switches that have a variety of applications in the industry. A compact model is developed in VHDL-AMS based on the device geometry and SiC material properties. The on-state model has been tested in mentor graphics' system vision VHDL-AMS simulator and it clearly replicates the behavior seen in experimental characterization as the validation results show.