F. Balarin, M. Chiodo, P. Giusto, H. Hsieh, Attila Jurecska, L. Lavagno, A. Sangiovanni-Vincentelli, E. Sentovich, Kei Suzuki
{"title":"Synthesis of Software Programs for Embedded Control Applications","authors":"F. Balarin, M. Chiodo, P. Giusto, H. Hsieh, Attila Jurecska, L. Lavagno, A. Sangiovanni-Vincentelli, E. Sentovich, Kei Suzuki","doi":"10.1145/217474.217594","DOIUrl":null,"url":null,"abstract":"Software components for embedded reactive real-time applications must satisfy tight code size and run-time constraints. Cooperating Finite State Machines provide a convenient intermediate format for embedded system co-synthesis, between high-level specification languages and software or hardware implementations. We propose a software generation methodology that takes advantage of the very restricted class of specifications and allows for tight control over the implementation cost. The methodology exploits several techniques from the domain of Boolean function optimization. We also describe how the simplified control/data-flow graph used as an intermediate representation can be used to accurately estimate the size and timing cost of the final executable code.","PeriodicalId":422297,"journal":{"name":"32nd Design Automation Conference","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"141","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"32nd Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/217474.217594","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 141
Abstract
Software components for embedded reactive real-time applications must satisfy tight code size and run-time constraints. Cooperating Finite State Machines provide a convenient intermediate format for embedded system co-synthesis, between high-level specification languages and software or hardware implementations. We propose a software generation methodology that takes advantage of the very restricted class of specifications and allows for tight control over the implementation cost. The methodology exploits several techniques from the domain of Boolean function optimization. We also describe how the simplified control/data-flow graph used as an intermediate representation can be used to accurately estimate the size and timing cost of the final executable code.