Thin Film Logic Circuit with Metal Capping Layered amorphous SiZnSnO thin-film transistors

B. Lee, Jae Min Byun, Sangsig Kim, Sang Yeol Lee
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Abstract

Various metal capping (MC) layer were deposited on the amorphous SiZnSnO channel layer to ensure high electrical properties. In addition, it was confirmed that the electrical characteristics change depending on the material of each MC layer. This effect is analyzed as a phenomenon which is caused by the difference between the work function of the MC layer and the work function of the channel layer. When the work function of the MC layer is smaller than the work function of the channel layer, the electrons are injected into the channel layer from the MC layer, so that higher electrical characteristics can be obtained. As a result, the electrical characteristics can be controlled by a simple change of the MC layer, and the logic circuits such as NOT, NAND, and NOR can be simply fabricated.
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金属盖层非晶sinsno薄膜晶体管的薄膜逻辑电路
在非晶态SiZnSnO沟道层上沉积了各种金属封盖层,以保证高的电学性能。此外,证实了电特性的变化取决于每个MC层的材料。分析了这种效应是由于MC层的功函数与通道层的功函数不同造成的现象。当MC层的功函数小于通道层的功函数时,电子从MC层注入到通道层中,从而可以获得更高的电特性。因此,可以通过简单地改变MC层来控制电特性,并且可以简单地制作NOT, NAND和NOR等逻辑电路。
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