Speculative trace scheduling in VLIW processors

Manvi Agarwal, S. Nandy, J. V. Eijndhoven, S. Balakrishnan
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引用次数: 7

Abstract

VLIW processors are statically scheduled processors and their performance depends on the quality of schedules generated by the compiler's scheduler. We propose a new scheduling scheme where the application is first divided into decision trees and then further split into traces. Traces are speculatively scheduled on the processor based on their probability of execution. We have developed a tool "SpliTree" to generate traces automatically. By using dynamic branch prediction for scheduling traces our scheme achieves approximately 1.4/spl times/ performance improvement over that using decision trees for Spec92 benchmarks simulated on TriMedia/spl trade/.
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VLIW处理器中的推测跟踪调度
VLIW处理器是静态调度的处理器,其性能取决于编译器调度程序生成的调度的质量。我们提出了一种新的调度方案,该方案首先将应用程序划分为决策树,然后进一步划分为路径。跟踪根据其执行的概率在处理器上进行推测调度。我们开发了一个工具“SpliTree”来自动生成轨迹。通过使用动态分支预测进行调度跟踪,我们的方案比在TriMedia/spl trade/上模拟的Spec92基准测试中使用决策树实现了大约1.4/spl时间/性能改进。
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