Information Models of VHDL

Abstract

The paper discusses issues related to the application of information modelling to the field of Electronic CAD, using VHDL as the basis for discussion. It is shown that an information model of VHDL provides a coherent and uniform description of the VHDL objects at different levels of the language and of the transformations that interrelate these levels. In addition, it captures the time-dependent aspects of the language. Hence, a hierarchy of VHDL information models can exist which encompasses the range from abstraction to detail and can help support CAD applications in a direct manner.