Design of a Wideband Compact CMOS Integrated Attenuator with Low Insertion Loss and High Accuracy

Yunzhao Sun, Chen-Chen Yang, Tong Li, N. Yan, Hongtao Xu
{"title":"Design of a Wideband Compact CMOS Integrated Attenuator with Low Insertion Loss and High Accuracy","authors":"Yunzhao Sun, Chen-Chen Yang, Tong Li, N. Yan, Hongtao Xu","doi":"10.1109/ICCS51219.2020.9336526","DOIUrl":null,"url":null,"abstract":"This paper presents an integrated attenuator (IATT) with 40nm bulk COMS process. The IATT that works from 15GHz to 20GHz can be used in phased array system and it only employs MOSFET rather than poly silicon resistors in the main signal path and can cover attenuation range up to 14 dB by step of 2 dB. Furthermore, the root-mean-square (RMS) attenuation error can be less than 0.15dB. Due to the integrated structure the IATT only occupies 0.167 mm2 including inductors (inds) and 0.0158 mm2 excluding inductors. Besides, the IATT also shows a relative low insertion loss less than 3dB. By adopting the shunt capacitor (cap) compensation technique the RMS phase error of the IATT can be less than 0.5°.","PeriodicalId":193552,"journal":{"name":"2020 IEEE 2nd International Conference on Circuits and Systems (ICCS)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 2nd International Conference on Circuits and Systems (ICCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCS51219.2020.9336526","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

This paper presents an integrated attenuator (IATT) with 40nm bulk COMS process. The IATT that works from 15GHz to 20GHz can be used in phased array system and it only employs MOSFET rather than poly silicon resistors in the main signal path and can cover attenuation range up to 14 dB by step of 2 dB. Furthermore, the root-mean-square (RMS) attenuation error can be less than 0.15dB. Due to the integrated structure the IATT only occupies 0.167 mm2 including inductors (inds) and 0.0158 mm2 excluding inductors. Besides, the IATT also shows a relative low insertion loss less than 3dB. By adopting the shunt capacitor (cap) compensation technique the RMS phase error of the IATT can be less than 0.5°.
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一种低插入损耗、高精度的宽带紧凑型CMOS集成衰减器设计
提出了一种采用40nm块体COMS工艺的集成衰减器(IATT)。工作在15GHz到20GHz的itt可以用于相控阵系统,它在主信号路径中只使用MOSFET而不是多晶硅电阻,并且可以覆盖高达14 dB的衰减范围。此外,均方根(RMS)衰减误差可小于0.15dB。由于采用了集成化的结构,包括电感在内,IATT的占地面积仅为0.167 mm2,不包括电感的占地面积仅为0.0158 mm2。此外,IATT还显示出相对较低的插入损耗,小于3dB。采用并联电容(帽)补偿技术,可使IATT的均方根相位误差小于0.5°。
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