{"title":"MMIC phase locked L-S band oscillators","authors":"J. Smuk, P. Katzin","doi":"10.1109/GAAS.1994.636911","DOIUrl":null,"url":null,"abstract":"We describe the design and measured performance of GaAs MMIC phase-locked oscillators (PLOs) operating concurrently at 1.353 GHz and 2.030 GHz. All the active components, including reference oscillator, phase/frequency comparators, charge pumps, voltage controlled oscillators (VCOs) and frequency dividers, are integrated on GaAs MMICs. The packaged MMICs are attached to a duroid mother board along with a small number of discrete components, resulting in a rugged dual PLO subassembly. Single sideband phase noise at 1 kHz offset is -87 dBc/Hz and -84 dBc/Hz, respectively. Phase lock is maintained over wide variations of temperature and power supply voltage.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1994 IEEE GaAs IC Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.1994.636911","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
We describe the design and measured performance of GaAs MMIC phase-locked oscillators (PLOs) operating concurrently at 1.353 GHz and 2.030 GHz. All the active components, including reference oscillator, phase/frequency comparators, charge pumps, voltage controlled oscillators (VCOs) and frequency dividers, are integrated on GaAs MMICs. The packaged MMICs are attached to a duroid mother board along with a small number of discrete components, resulting in a rugged dual PLO subassembly. Single sideband phase noise at 1 kHz offset is -87 dBc/Hz and -84 dBc/Hz, respectively. Phase lock is maintained over wide variations of temperature and power supply voltage.