Lucas F. S. Cambuim, Severino J. B. Júnior, Edna Barros
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引用次数: 1
Abstract
The CPU-FPGA heterogeneous architectures became an attractive option for developing hardware accelerators to process computer vision algorithms. In this paper, we improve the support for streaming processing on the Intel HARPv2 platform by proposing strategies such as data ordering, double buffer, and management of multiple memory addresses. We demonstrate the feasibility of this new strategy by a case study with a hardware implementation of the Semi-Global Matching (SGM) algorithm for stereo vision. With these strategies, we can process depth images with a resolution of 1920×1080 pixels achieving a processing rate of about 48 FPS. The processing performance overcomes the state-of-art CPU-FPGA heterogeneous architectures results for processing of the promissing SGM technique.