Pub Date : 2020-06-01DOI: 10.1109/NEWCAS49341.2020.9159790
Seyed Sepehr Mirfakhraei, Y. Audet, Ahmad Hassan, Mohamed Ali, Morteza Nabavi, M. Sawan
In this paper, we present a high common mode voltage amplifier with a novel isolation technique. In this proposed structure, a minimum of 430 V isolation is satisfied from on-chip intermetal SiO2 layers. On the high-voltage side, an adjustable gain amplifier that supports ±2.5 V of differential voltage drives the coil. However, on the low-voltage side, a CMOS integrated magnetic field sensitive MOSFET (MAGFET) placed under the coil converts the generated magnetic field into a current imbalance which will be transformed to a differential voltage via a cascode stage. In addition, based on the ADC input dynamic range, the signal amplitude is adjusted by using a 6-bit dB-linear programmable gain amplifier (PGA) with a gain range of 0 to 54 dB and a maximum gain-nonlinearity error of 0.2 dB. This PGA has a temperature independent characteristic with a maximum gain error of 0.21 dB over a temperature variation between −40 to 80 °C. The design achieves a low input offset of 0.18 mV. It has also a low current consumption of 1.2 and 2.3 mA for the high voltage and the low voltage side, respectively.
{"title":"A CMOS MAGFET-Based Programmable Isolation Amplifier","authors":"Seyed Sepehr Mirfakhraei, Y. Audet, Ahmad Hassan, Mohamed Ali, Morteza Nabavi, M. Sawan","doi":"10.1109/NEWCAS49341.2020.9159790","DOIUrl":"https://doi.org/10.1109/NEWCAS49341.2020.9159790","url":null,"abstract":"In this paper, we present a high common mode voltage amplifier with a novel isolation technique. In this proposed structure, a minimum of 430 V isolation is satisfied from on-chip intermetal SiO2 layers. On the high-voltage side, an adjustable gain amplifier that supports ±2.5 V of differential voltage drives the coil. However, on the low-voltage side, a CMOS integrated magnetic field sensitive MOSFET (MAGFET) placed under the coil converts the generated magnetic field into a current imbalance which will be transformed to a differential voltage via a cascode stage. In addition, based on the ADC input dynamic range, the signal amplitude is adjusted by using a 6-bit dB-linear programmable gain amplifier (PGA) with a gain range of 0 to 54 dB and a maximum gain-nonlinearity error of 0.2 dB. This PGA has a temperature independent characteristic with a maximum gain error of 0.21 dB over a temperature variation between −40 to 80 °C. The design achieves a low input offset of 0.18 mV. It has also a low current consumption of 1.2 and 2.3 mA for the high voltage and the low voltage side, respectively.","PeriodicalId":135163,"journal":{"name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123080238","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.1109/NEWCAS49341.2020.9159780
Amirhossein Moshrefi, F. Nabki
Emboli detection and denoising have been the focus of attention from many years. Emboli can be occurred because of the air bubbles, concentrated fat particles or blood clotted in a vessel. The detection of this issue can be possible by employing Doppler ultrasonic transducers. However, this method would be very sensitive to peripheral noise. In this paper for emboli denoising, CEEMDAN as one of the newest and effective methods is introduced. Then, an algorithm for emboli detection based on Bayesian estimation is proposed. The results are compared with a recent method, showing that the proposed method yields an SNR that this improved by 45% and an accuracy rate of 94%.
{"title":"A New Method to Improve the Quality of Embolic Ultrasound Signal Detection","authors":"Amirhossein Moshrefi, F. Nabki","doi":"10.1109/NEWCAS49341.2020.9159780","DOIUrl":"https://doi.org/10.1109/NEWCAS49341.2020.9159780","url":null,"abstract":"Emboli detection and denoising have been the focus of attention from many years. Emboli can be occurred because of the air bubbles, concentrated fat particles or blood clotted in a vessel. The detection of this issue can be possible by employing Doppler ultrasonic transducers. However, this method would be very sensitive to peripheral noise. In this paper for emboli denoising, CEEMDAN as one of the newest and effective methods is introduced. Then, an algorithm for emboli detection based on Bayesian estimation is proposed. The results are compared with a recent method, showing that the proposed method yields an SNR that this improved by 45% and an accuracy rate of 94%.","PeriodicalId":135163,"journal":{"name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116269207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.1109/NEWCAS49341.2020.9159774
J. Forest, V. Knopik, E. Kerhervé
The paper is related to 5G power amplifier architecture which is robust to the environment variations. One of the main PA challenges is to control the phase of the PA while maintaining its RF performances according to the manufacturing process variations (PVT). Another challenge is to achieve high efficiency, while providing very good linearity. In such conditions, the PA phase control is a major advantage. This work first quantifies the impact of the phased-array antenna impedance variations on the power amplifier RF performances (gain, phase shift). Then, 130nm SiGe BiCMOS9 and 65nm CMOS-SOI measurements of 5G self-contained PAs demonstrate the robustness against VSWR antenna variations and address the phase control issue.
{"title":"Self-Contained Power Amplifier for 5G","authors":"J. Forest, V. Knopik, E. Kerhervé","doi":"10.1109/NEWCAS49341.2020.9159774","DOIUrl":"https://doi.org/10.1109/NEWCAS49341.2020.9159774","url":null,"abstract":"The paper is related to 5G power amplifier architecture which is robust to the environment variations. One of the main PA challenges is to control the phase of the PA while maintaining its RF performances according to the manufacturing process variations (PVT). Another challenge is to achieve high efficiency, while providing very good linearity. In such conditions, the PA phase control is a major advantage. This work first quantifies the impact of the phased-array antenna impedance variations on the power amplifier RF performances (gain, phase shift). Then, 130nm SiGe BiCMOS9 and 65nm CMOS-SOI measurements of 5G self-contained PAs demonstrate the robustness against VSWR antenna variations and address the phase control issue.","PeriodicalId":135163,"journal":{"name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125846305","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.1109/newcas49341.2020.9159832
V. Sirtoli, G. Gagnon, G. Cowan
The standard electrocardiogram (ECG) depends on wet electrodes which contain a conductive gel that may cause irritation and dry out during long term measurements leading to artifacts. Capacitively-Coupled ECG (ccECG) promises to allow physicians to perform ECG through clothing or unprepared skin, without conductive gel. However, as the patient moves, air gaps are created between electrodes and the skin. Thus, the total interface capacitance varies during ccECG measurements giving rise to motion artifacts (MA). To mitigate this issue, a circuit implementing negative feedback through the human body is proposed. The system relies on the principle that the coupling capacitance and input capacitance forms a gain stage which changes as motion happens. By adding the feedback stage, this gain is stabilized. When the coupling capacitance is swept from 100 nF to 1 pF in Spice simulation, within a frequency range of 500 mHz to 100 Hz, the system gain fluctuations are reduced from 12 dB (open-loop) down to 2 dB using the proposed technique. The proposed system can maintain the same bandwidth, similar settling time and does not present instability for the desired gain and frequency range.
{"title":"Motion Artifact Mitigation Using Negative Feedback in Capacitively-Coupled ECG","authors":"V. Sirtoli, G. Gagnon, G. Cowan","doi":"10.1109/newcas49341.2020.9159832","DOIUrl":"https://doi.org/10.1109/newcas49341.2020.9159832","url":null,"abstract":"The standard electrocardiogram (ECG) depends on wet electrodes which contain a conductive gel that may cause irritation and dry out during long term measurements leading to artifacts. Capacitively-Coupled ECG (ccECG) promises to allow physicians to perform ECG through clothing or unprepared skin, without conductive gel. However, as the patient moves, air gaps are created between electrodes and the skin. Thus, the total interface capacitance varies during ccECG measurements giving rise to motion artifacts (MA). To mitigate this issue, a circuit implementing negative feedback through the human body is proposed. The system relies on the principle that the coupling capacitance and input capacitance forms a gain stage which changes as motion happens. By adding the feedback stage, this gain is stabilized. When the coupling capacitance is swept from 100 nF to 1 pF in Spice simulation, within a frequency range of 500 mHz to 100 Hz, the system gain fluctuations are reduced from 12 dB (open-loop) down to 2 dB using the proposed technique. The proposed system can maintain the same bandwidth, similar settling time and does not present instability for the desired gain and frequency range.","PeriodicalId":135163,"journal":{"name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130701534","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.1109/newcas49341.2020.9159812
W. Khaddour, F. Dadouche, W. Uhring, V. Frick, M. Madec
There are hundreds of research publications that theoretically discuss the implementation of Tapped Delay Line based Time to Digital Converters (TDL TDCs) on Field-Programmable Gate Array (FPGA) targets. However, most of these works do not cover the timing issues that will be encountered mostly due to the routing delays. The purpose of this work is to highlight the main timing issues that should be considered when implementing TDCs in FPGA targets and propose practical approaches to overcome these issues. As a study case, a full design methodology of a TDC on a Cyclone V FPGA target is presented in this work.
已有数百篇研究论文从理论上讨论了在现场可编程门阵列(FPGA)目标上实现基于抽头延迟线的时间数字转换器(TDL tdc)。然而，这些工作大多没有涵盖由于路由延迟而遇到的时间问题。这项工作的目的是强调在FPGA目标中实现tdc时应考虑的主要时序问题，并提出克服这些问题的实用方法。作为一个研究案例，在本工作中提出了Cyclone V FPGA目标上TDC的完整设计方法。
{"title":"Design Methodology and Timing Considerations for implementing a TDC on a Cyclone V FPGA Target","authors":"W. Khaddour, F. Dadouche, W. Uhring, V. Frick, M. Madec","doi":"10.1109/newcas49341.2020.9159812","DOIUrl":"https://doi.org/10.1109/newcas49341.2020.9159812","url":null,"abstract":"There are hundreds of research publications that theoretically discuss the implementation of Tapped Delay Line based Time to Digital Converters (TDL TDCs) on Field-Programmable Gate Array (FPGA) targets. However, most of these works do not cover the timing issues that will be encountered mostly due to the routing delays. The purpose of this work is to highlight the main timing issues that should be considered when implementing TDCs in FPGA targets and propose practical approaches to overcome these issues. As a study case, a full design methodology of a TDC on a Cyclone V FPGA target is presented in this work.","PeriodicalId":135163,"journal":{"name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131220347","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.1109/newcas49341.2020.9159835
A. Giry, A. Serhan, D. Parat, P. Reynier
5G are stimulating major research efforts on next-generation power amplifiers (PAs). This paper presents a comprehensive overview of recent linear watt-level PA developments for mobile applications operating below 6GHz. A survey on state-of-the-art PAs is presented focusing on recently published envelope tracking and Doherty architectures.
{"title":"Linear Power Amplifiers for Sub-6GHz Mobile Applications : Progress and Trends","authors":"A. Giry, A. Serhan, D. Parat, P. Reynier","doi":"10.1109/newcas49341.2020.9159835","DOIUrl":"https://doi.org/10.1109/newcas49341.2020.9159835","url":null,"abstract":"5G are stimulating major research efforts on next-generation power amplifiers (PAs). This paper presents a comprehensive overview of recent linear watt-level PA developments for mobile applications operating below 6GHz. A survey on state-of-the-art PAs is presented focusing on recently published envelope tracking and Doherty architectures.","PeriodicalId":135163,"journal":{"name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132953947","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.1109/newcas49341.2020.9159837
A. S. Emara, G. Roberts, S. Aouini, M. Parvizi, Naim Ben-Hamida
Testing high-resolution data converters is often performed using Automatic Test Equipment (ATE) that has lower resolution Integrated Chips (ICs). Hence, indirect voltage measurements are required. To perform these measurements programmable DC voltage sources are essential. An area efficient technique in generating DC voltage sources is the one that saves a ΣΔ bitstream generated in software in the memory of an ATE and apply it periodically to a low-pass filter (LPF). The Noise Transfer Function (NTF) of the ΣΔM has been selected from the Butterworth, Butterworth with zeros, Bessel and Gaussian families for ΣΔM orders from 1 to 4. An investigation was conducted to figure out the best ΣΔM type and order that should be used. It will be shown that using a high-order Butterworth-based ΣΔ bitstream yields the lowest settling time. This means the DC voltage levels will be available for usage quicker than the other ΣΔM types. Hence, reducing the time taken to test an IC, which in-turn minimizes the time to market and maximizes profit margins.
{"title":"Using Optimized Butterworth-Based $SigmaDelta$ Bitstreams for the Testing of High-Resolution Data Converters","authors":"A. S. Emara, G. Roberts, S. Aouini, M. Parvizi, Naim Ben-Hamida","doi":"10.1109/newcas49341.2020.9159837","DOIUrl":"https://doi.org/10.1109/newcas49341.2020.9159837","url":null,"abstract":"Testing high-resolution data converters is often performed using Automatic Test Equipment (ATE) that has lower resolution Integrated Chips (ICs). Hence, indirect voltage measurements are required. To perform these measurements programmable DC voltage sources are essential. An area efficient technique in generating DC voltage sources is the one that saves a ΣΔ bitstream generated in software in the memory of an ATE and apply it periodically to a low-pass filter (LPF). The Noise Transfer Function (NTF) of the ΣΔM has been selected from the Butterworth, Butterworth with zeros, Bessel and Gaussian families for ΣΔM orders from 1 to 4. An investigation was conducted to figure out the best ΣΔM type and order that should be used. It will be shown that using a high-order Butterworth-based ΣΔ bitstream yields the lowest settling time. This means the DC voltage levels will be available for usage quicker than the other ΣΔM types. Hence, reducing the time taken to test an IC, which in-turn minimizes the time to market and maximizes profit margins.","PeriodicalId":135163,"journal":{"name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132721784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.1109/newcas49341.2020.9159810
Hongjiang Yu, Weiping Zhu
In this paper, we present a deep neural network (DNN) based complex spectrogram reconstruction algorithm for speech bandwidth expansion, where the DNN is applied for estimating the real and imaginary parts of spectrograms of the wideband speech from those of the narrowband speech. Unlike the previous DNN based method, which only estimates the magnitude and employs the simple mirror version phase for reconstruction, we employ the complex spectrogram to recover the magnitude and phase of the high-frequency component simultaneously. Experimental results demonstrate that our proposed method outperforms the non-negative matrix factorization (NMF) and the state-of-the-art DNN based speech bandwidth expansion methods in terms of objective performance metrics.
{"title":"Deep Neural Network based Complex Spectrogram Reconstruction for Speech Bandwidth Expansion","authors":"Hongjiang Yu, Weiping Zhu","doi":"10.1109/newcas49341.2020.9159810","DOIUrl":"https://doi.org/10.1109/newcas49341.2020.9159810","url":null,"abstract":"In this paper, we present a deep neural network (DNN) based complex spectrogram reconstruction algorithm for speech bandwidth expansion, where the DNN is applied for estimating the real and imaginary parts of spectrograms of the wideband speech from those of the narrowband speech. Unlike the previous DNN based method, which only estimates the magnitude and employs the simple mirror version phase for reconstruction, we employ the complex spectrogram to recover the magnitude and phase of the high-frequency component simultaneously. Experimental results demonstrate that our proposed method outperforms the non-negative matrix factorization (NMF) and the state-of-the-art DNN based speech bandwidth expansion methods in terms of objective performance metrics.","PeriodicalId":135163,"journal":{"name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122139727","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.1109/NEWCAS49341.2020.9159826
Rudraneil Saha, A. C. Carusone
Whereas previous architectures for spatial blocker cancellation were hindered by their scalability with the number of antennas leading to a high increase in the area and power consumption with the increase in the number of antennas, we propose a blocker cancellation technique that overcomes this by having linear complexity with the number of antennas, making it suitable for receivers with a large number of antennas. The proposed cancellation technique attenuates the blocker signals prior to the ADC relaxing its dynamic range requirement, while preserving the field-of-view (FoV) in each antenna element for subsequent digital beamforming/array signal processing.
{"title":"An Adaptive Spatial Blocker Cancellation Receiver for Multiple Antenna Systems","authors":"Rudraneil Saha, A. C. Carusone","doi":"10.1109/NEWCAS49341.2020.9159826","DOIUrl":"https://doi.org/10.1109/NEWCAS49341.2020.9159826","url":null,"abstract":"Whereas previous architectures for spatial blocker cancellation were hindered by their scalability with the number of antennas leading to a high increase in the area and power consumption with the increase in the number of antennas, we propose a blocker cancellation technique that overcomes this by having linear complexity with the number of antennas, making it suitable for receivers with a large number of antennas. The proposed cancellation technique attenuates the blocker signals prior to the ADC relaxing its dynamic range requirement, while preserving the field-of-view (FoV) in each antenna element for subsequent digital beamforming/array signal processing.","PeriodicalId":135163,"journal":{"name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126019302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.1109/newcas49341.2020.9159823
Simon Bellemare-Rousseau, Gabriel P. Lachance, Shimwe Dominique Niyonambaza, Élodie Boisselier, M. Boukadoum, A. Miled
Neurotransmitter sensing is essential in biomedical research to understand brain behavior, with Optical sensing useful for passive measurements. For instance, visible-light spectrophotometry can be used to detect and measure neurotransmitter concentrations in liquid. An important part of the process is the prediction of molecule concentration from the measured data. This work describes an FPGA-based system to measure neurotransmitter concentration in a multi-sensor platform, using a visible-light optical spectrometer and a simple regression predictor. The design required very few hardware resources and it was tested on dopamine data with excellent results.
{"title":"FPGA-based Prediction System for Neurotransmitter Concentration Measurement from Spectrophotometry Data","authors":"Simon Bellemare-Rousseau, Gabriel P. Lachance, Shimwe Dominique Niyonambaza, Élodie Boisselier, M. Boukadoum, A. Miled","doi":"10.1109/newcas49341.2020.9159823","DOIUrl":"https://doi.org/10.1109/newcas49341.2020.9159823","url":null,"abstract":"Neurotransmitter sensing is essential in biomedical research to understand brain behavior, with Optical sensing useful for passive measurements. For instance, visible-light spectrophotometry can be used to detect and measure neurotransmitter concentrations in liquid. An important part of the process is the prediction of molecule concentration from the measured data. This work describes an FPGA-based system to measure neurotransmitter concentration in a multi-sensor platform, using a visible-light optical spectrometer and a simple regression predictor. The design required very few hardware resources and it was tested on dopamine data with excellent results.","PeriodicalId":135163,"journal":{"name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128176029","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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