On the diminished-1 modulo 2N+1 fused multiply-add units

Abstract

In this work the most efficient modulo 2ⁿ+1 multiplication algorithm for diminished-1 operands proposed to date is extended to compute expressions of the form |A×B + D|2n+1. The derived partial products are reduced by a carry save adder tree to two operands, which are finally added by a modulo 2ⁿ+1 adder. The proposed architecture can find applicability in systems in which fused multiply-add units can accelerate the execution of the targeting algorithms, for example digital signal processing and cryptography systems.