{"title":"A Dependable Small World Communication Processor","authors":"H. Mori","doi":"10.1109/CISIS.2016.102","DOIUrl":null,"url":null,"abstract":"Over many years, the technology of circuit refinement has achieved a tremendous large-scale integration, so that VLSI systems such as many-core VLSI processor have emerged. However, in the huge VLSI systems, various problems such as many communication problems of the VLSI network, clock synchronization of the entire system, and verification of concurrent processing, must be solved in order to realize a dependable parallel system. In this paper, we introduce a parallel architecture with short path communication, featuring a random connection in Small World Network, and present network architecture without global clock using communicative process by CSP synchronization method.","PeriodicalId":249236,"journal":{"name":"2016 10th International Conference on Complex, Intelligent, and Software Intensive Systems (CISIS)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 10th International Conference on Complex, Intelligent, and Software Intensive Systems (CISIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CISIS.2016.102","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

Over many years, the technology of circuit refinement has achieved a tremendous large-scale integration, so that VLSI systems such as many-core VLSI processor have emerged. However, in the huge VLSI systems, various problems such as many communication problems of the VLSI network, clock synchronization of the entire system, and verification of concurrent processing, must be solved in order to realize a dependable parallel system. In this paper, we introduce a parallel architecture with short path communication, featuring a random connection in Small World Network, and present network architecture without global clock using communicative process by CSP synchronization method.
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一个可靠的小世界通信处理器
多年来,电路精细化技术实现了巨大的大规模集成化,从而出现了多核VLSI处理器等VLSI系统。然而,在庞大的VLSI系统中,为了实现可靠的并行系统,必须解决VLSI网络的众多通信问题、整个系统的时钟同步、并发处理的验证等各种问题。本文介绍了一种在小世界网络中具有随机连接特性的短路并行通信体系结构,并采用CSP同步方法提出了一种无全局时钟通信的网络体系结构。
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