A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers

Yuki Yamashita, D. Kanemoto, H. Kanaya, Ramesh K. Pokharel, K. Yoshida
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引用次数: 11

Abstract

This paper describes the design of 5-GHz fully integrated CMOS class-E single-ended power amplifier (PA) for wireless transmitter applications in a 0.18-μm CMOS technology. The proposed class-E PA employs the cascode topology with a self-biasing technique to reduce device stress. Three cascaded class-D driver amplifiers are used to actualize the sharp switching at the class-E power stage. All device components are integrated on chip and the chip area is 1.0×1.3 mm2. The measurement results indicate that the PA delivers 16.4 dBm output power and 35.4 % power-added efficiency with 2.3 V power supply voltage into a 50 Ω load.
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采用级联d类驱动器的自偏置技术的5 ghz全集成CMOS e类功率放大器
介绍了一种基于0.18 μm CMOS技术的5 ghz全集成CMOS e类单端功率放大器(PA)的设计。所提出的e类PA采用级联码拓扑和自偏置技术来减少器件应力。三个级联的d类驱动放大器用于实现e类功率级的急剧开关。所有器件集成在芯片上,芯片面积为1.0×1.3 mm2。测量结果表明,在2.3 V电源电压下,PA在50 Ω负载下的输出功率为16.4 dBm,功率增益效率为35.4%。
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