Advances in industrial practices for optimal performance/reliability/power trade-off in commercial high-performance microprocessors for wireless applications
V. Huard, F. Cacho, L. Claramond, P. Alves, W. Dalkowski, D. Jacquet, S. Lecomte, M. Tan, B. Delemer, A. Kamoun, V. Fraisse
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引用次数: 4
Abstract
This paper deals with the challenge of optimizing the performance/reliability/power trade-off in commercial high-performance microprocessors for wireless applications in advanced CMOS nodes. Both the increased impact of electrical reliability degradation and an increased thermal runaway risk require a dedicated approach combining product engineering and high-level modeling approach to achieve optimal reliability guardband determination even in the case of numerous, discrete V-F operating modes and their related mission profiles.
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