{"title":"Miniaturized branch-line coupler for 60 GHz frequency band applications using CMOS technology","authors":"A. Talebzadeh, A. Mohammadi, A. Abdipour","doi":"10.1109/MMWATT.2012.6532164","DOIUrl":null,"url":null,"abstract":"In this paper, a compact branch-line coupler (BLC) for 60 GHz frequency band applications by using CMOS technology is presented. By use of meandered thin-film microstrip (TFMS) transmission line, miniaturized BLC can be obtained. To further decreasing of BLC dimension, capacitive loading technique (CLT) is used. It is shown that these two techniques results in 0.063 mm2 occupied area, which is leading to a suitable structure for low cost and compact MMIC technology. The design procedure has advantage of the multi-level metallization processes offered in CMOS technology. The analysis is based on a full-wave commercial electromagnetic (EM) package, ADS Momentum. The simulation results provide wideband characteristics impedance over 57-64 GHz frequency band, as well as good transmission loss and isolation between ports.","PeriodicalId":297799,"journal":{"name":"2012 Second Conference on Millimeter-Wave and Terahertz Technologies (MMWaTT)","volume":"116 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 Second Conference on Millimeter-Wave and Terahertz Technologies (MMWaTT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MMWATT.2012.6532164","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
In this paper, a compact branch-line coupler (BLC) for 60 GHz frequency band applications by using CMOS technology is presented. By use of meandered thin-film microstrip (TFMS) transmission line, miniaturized BLC can be obtained. To further decreasing of BLC dimension, capacitive loading technique (CLT) is used. It is shown that these two techniques results in 0.063 mm2 occupied area, which is leading to a suitable structure for low cost and compact MMIC technology. The design procedure has advantage of the multi-level metallization processes offered in CMOS technology. The analysis is based on a full-wave commercial electromagnetic (EM) package, ADS Momentum. The simulation results provide wideband characteristics impedance over 57-64 GHz frequency band, as well as good transmission loss and isolation between ports.