{"title":"Hot Carrier Effect on NMOSFETs by Stripe and Annular Gate Design","authors":"Xiaodong Xie, Xiwen Zhang, Wei Li, Xue Fan","doi":"10.1109/ICCCAS.2018.8769254","DOIUrl":null,"url":null,"abstract":"Previous studies about hot carrier effect on MOSFETs by stripe and annular gate design are contradictory. The reasons behind includes that only one parameter is used to characterize the hot carrier effect, technology nodes are different, and the ratio of channel width to length is not identical. We investigate the issue in terms of several parameters including threshold voltage VT, maximum transconductance Gmmax and saturation drain current IDsat. The NMOSFETs under test are fabricated on 65nm CMOS technology. Experiment results demonstrate that the total-ionizing-dose-hardened annular-gate NMOSFET can be characterized by its higher hot-carrier reliability on digital circuit speed performance than stripe-gate design.","PeriodicalId":166878,"journal":{"name":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCCAS.2018.8769254","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Previous studies about hot carrier effect on MOSFETs by stripe and annular gate design are contradictory. The reasons behind includes that only one parameter is used to characterize the hot carrier effect, technology nodes are different, and the ratio of channel width to length is not identical. We investigate the issue in terms of several parameters including threshold voltage VT, maximum transconductance Gmmax and saturation drain current IDsat. The NMOSFETs under test are fabricated on 65nm CMOS technology. Experiment results demonstrate that the total-ionizing-dose-hardened annular-gate NMOSFET can be characterized by its higher hot-carrier reliability on digital circuit speed performance than stripe-gate design.
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