Pub Date : 2018-12-01DOI: 10.1109/ICCCAS.2018.8769188
Zhihao Wang, F. Zhou
The performance of traditional part model in person retrieval is greatly affected by the quality of parts. The recent work[1] consider refining the hard partitioned part when training the network itself and got state-of-the-art performance, but during our experimentation, we found the masks which it generated contains the problems that misguide the networks with additional constraints, Targeting to solve above problem, we proposed a new networks called Global Refine Net. The backbone network focus on learning the local information which improve the ability of extract feature of details, Global Refine block introduce global information to adjust the hard-shaped part generated by the backbone network in an end-to-end manner. Also we modified the self-adversarial training mechanism in [1]. We employ an special loss function to prevent the incorrect convergence and adjust the degree of self-adversarial training, the new regularization term we added in the loss benefit both in stabilizing and speeding the training process. The performance of our model beat most previous soft partitioned works, improved about 2.3% rank-1 accuracy and 5.1% mAP to the PCB baseline on market-1501 dataset.
{"title":"Global Based Deep Refineing Model For Person Retrieval","authors":"Zhihao Wang, F. Zhou","doi":"10.1109/ICCCAS.2018.8769188","DOIUrl":"https://doi.org/10.1109/ICCCAS.2018.8769188","url":null,"abstract":"The performance of traditional part model in person retrieval is greatly affected by the quality of parts. The recent work[1] consider refining the hard partitioned part when training the network itself and got state-of-the-art performance, but during our experimentation, we found the masks which it generated contains the problems that misguide the networks with additional constraints, Targeting to solve above problem, we proposed a new networks called Global Refine Net. The backbone network focus on learning the local information which improve the ability of extract feature of details, Global Refine block introduce global information to adjust the hard-shaped part generated by the backbone network in an end-to-end manner. Also we modified the self-adversarial training mechanism in [1]. We employ an special loss function to prevent the incorrect convergence and adjust the degree of self-adversarial training, the new regularization term we added in the loss benefit both in stabilizing and speeding the training process. The performance of our model beat most previous soft partitioned works, improved about 2.3% rank-1 accuracy and 5.1% mAP to the PCB baseline on market-1501 dataset.","PeriodicalId":166878,"journal":{"name":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115684616","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-12-01DOI: 10.1109/ICCCAS.2018.8768976
Bo Lu, Wenjuan Mei, Jianming Zhou, Hu Zhou, Li Du, Zhen Liu
Over decades, testing sequence optimization has been an important part for the design of testability (DFT). However, most existed method suffers from high searching complexity. Meanwhile, with the high speed of updating with electronic technology, the cost for test points and the probability of the fault state varies due to the development of the systems. Therefore, how to update the testing sequential model comes to be important to improve the efficiency on diagnosis. Since that, in this paper, we proposed a new testing sequence optimization method based on AO* and dynamic programming to improve the efficiency on generate solutions. Also, we develop the updating method for the problem under three dynamic conditions which may change the optima solution. The experiments shows that our method can achieve better performance than several state-of-art algorithms.
{"title":"An Novel Testing Sequence Optimization Method under Dynamic Environments","authors":"Bo Lu, Wenjuan Mei, Jianming Zhou, Hu Zhou, Li Du, Zhen Liu","doi":"10.1109/ICCCAS.2018.8768976","DOIUrl":"https://doi.org/10.1109/ICCCAS.2018.8768976","url":null,"abstract":"Over decades, testing sequence optimization has been an important part for the design of testability (DFT). However, most existed method suffers from high searching complexity. Meanwhile, with the high speed of updating with electronic technology, the cost for test points and the probability of the fault state varies due to the development of the systems. Therefore, how to update the testing sequential model comes to be important to improve the efficiency on diagnosis. Since that, in this paper, we proposed a new testing sequence optimization method based on AO* and dynamic programming to improve the efficiency on generate solutions. Also, we develop the updating method for the problem under three dynamic conditions which may change the optima solution. The experiments shows that our method can achieve better performance than several state-of-art algorithms.","PeriodicalId":166878,"journal":{"name":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124282324","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-12-01DOI: 10.1109/ICCCAS.2018.8768933
Li Xin, Song Chong-xiao, Yang Zhen
In order to research the precursory information of coal-rock dynamic disasters, Uniaxial loading fracture experiment of composite coal-rockis is carried out in three different loading rates. The results show that there are obvious precursor signals of charge-induced and EME before the rupture of the instable coal-rock. The signals enhance gradually with the increase of the loading stress. There is a quadratic polynomial relationship between EME and charge-induced. The multiple correlation coefficient is above 0.8. The changes of charge-induced signal of the coal sample are more obvious than that of the roof and floor rock. The change rate of EME and charge-induced is almost identical to their amplitude. However, they are not completely synchronized. Although the mechanism of EME and charge-induced is quite different, each other are closely related.
{"title":"Research on Correlation of Electromagnetic and Induced Charge of Coal-rock in Deformation and Fracture","authors":"Li Xin, Song Chong-xiao, Yang Zhen","doi":"10.1109/ICCCAS.2018.8768933","DOIUrl":"https://doi.org/10.1109/ICCCAS.2018.8768933","url":null,"abstract":"In order to research the precursory information of coal-rock dynamic disasters, Uniaxial loading fracture experiment of composite coal-rockis is carried out in three different loading rates. The results show that there are obvious precursor signals of charge-induced and EME before the rupture of the instable coal-rock. The signals enhance gradually with the increase of the loading stress. There is a quadratic polynomial relationship between EME and charge-induced. The multiple correlation coefficient is above 0.8. The changes of charge-induced signal of the coal sample are more obvious than that of the roof and floor rock. The change rate of EME and charge-induced is almost identical to their amplitude. However, they are not completely synchronized. Although the mechanism of EME and charge-induced is quite different, each other are closely related.","PeriodicalId":166878,"journal":{"name":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126174076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-12-01DOI: 10.1109/ICCCAS.2018.8769189
Shouping Li, Yang Guo, Yao Liu, Jianjun Chen, Qing Xu, Jizuo Zhang
This paper put forward a 12-b 25MS/s Successive Approximation Register Analog-to-Digital Converter (SAR ADC) architecture based on power efficiency Capacitive Digital-to-Analog (CDAC) and a two stages amplifier full-scale differential dynamic comparator. A tri-level switching scheme is being used to achieve the highest switching efficiency while still conserving the symmetry in error tolerance. The prototype implementation in 130nm CMOS technology achieves a 70.1dB SNDR at 25MS/s, while dissipating 0.21mW from a 1.2V voltage supply, leading to a FoM of 37.4fJ/conversion-step.
{"title":"A 1.2V 12 Bits SAR ADC with a Two Stages Amplifier Full-scale Differential Dynamic Comparator","authors":"Shouping Li, Yang Guo, Yao Liu, Jianjun Chen, Qing Xu, Jizuo Zhang","doi":"10.1109/ICCCAS.2018.8769189","DOIUrl":"https://doi.org/10.1109/ICCCAS.2018.8769189","url":null,"abstract":"This paper put forward a 12-b 25MS/s Successive Approximation Register Analog-to-Digital Converter (SAR ADC) architecture based on power efficiency Capacitive Digital-to-Analog (CDAC) and a two stages amplifier full-scale differential dynamic comparator. A tri-level switching scheme is being used to achieve the highest switching efficiency while still conserving the symmetry in error tolerance. The prototype implementation in 130nm CMOS technology achieves a 70.1dB SNDR at 25MS/s, while dissipating 0.21mW from a 1.2V voltage supply, leading to a FoM of 37.4fJ/conversion-step.","PeriodicalId":166878,"journal":{"name":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124114421","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-12-01DOI: 10.1109/ICCCAS.2018.8768972
Qing-min Meng, Xiaoqiang Fang, Wenjing Yue, Yang Meng, Jingcheng Wei
By combining artificial intelligence and machine learning, next-generation cellular systems will enable advanced data analysis techniques to achieve efficient service quality management and network automation. In this paper, the Bayesian Network (BN) is used for the reliability prediction of throughput. The forecast is to predict future test results through parameter estimation. In the studied Bayesian network learning stage, the load of the base station, user location and moving speed all affect the user’s received signal-to noise ratio (SNR) and signal interference plus noise ratio (SINR). The test result is the probability or number of times that throughput of a low-speed mobile user satisfies the threshold. Computer simulation results show that the model can well infer the user’s throughput under low speed movement conditions.
{"title":"Bayesian Network Prediction of Mobile User Throughput in 5G Wireless Networks","authors":"Qing-min Meng, Xiaoqiang Fang, Wenjing Yue, Yang Meng, Jingcheng Wei","doi":"10.1109/ICCCAS.2018.8768972","DOIUrl":"https://doi.org/10.1109/ICCCAS.2018.8768972","url":null,"abstract":"By combining artificial intelligence and machine learning, next-generation cellular systems will enable advanced data analysis techniques to achieve efficient service quality management and network automation. In this paper, the Bayesian Network (BN) is used for the reliability prediction of throughput. The forecast is to predict future test results through parameter estimation. In the studied Bayesian network learning stage, the load of the base station, user location and moving speed all affect the user’s received signal-to noise ratio (SNR) and signal interference plus noise ratio (SINR). The test result is the probability or number of times that throughput of a low-speed mobile user satisfies the threshold. Computer simulation results show that the model can well infer the user’s throughput under low speed movement conditions.","PeriodicalId":166878,"journal":{"name":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","volume":"219 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116491751","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-12-01DOI: 10.1109/ICCCAS.2018.8769183
Biao Deng, Yang Chen, Liguo Sun
This paper discusses the design of lumped elements low pass filter (LPF) in DC-1GHz range with GaAs integrated passive device (IPD) technology. Two shunt capacitors are added to the inductors to create transmission zeros at about 2.1GHz and 3.4GHz. The filter designed by this method has a simple structure, a small area, and high out-of-band rejection. The fabricated low pass filter has insertion loss of 0.8 dB and harmonic rejections of 40 dB with die size of 592um*1130um including pads.
{"title":"DC-1GHz Low-Pass Filters Using GaAs Integrated Passive Device Technology","authors":"Biao Deng, Yang Chen, Liguo Sun","doi":"10.1109/ICCCAS.2018.8769183","DOIUrl":"https://doi.org/10.1109/ICCCAS.2018.8769183","url":null,"abstract":"This paper discusses the design of lumped elements low pass filter (LPF) in DC-1GHz range with GaAs integrated passive device (IPD) technology. Two shunt capacitors are added to the inductors to create transmission zeros at about 2.1GHz and 3.4GHz. The filter designed by this method has a simple structure, a small area, and high out-of-band rejection. The fabricated low pass filter has insertion loss of 0.8 dB and harmonic rejections of 40 dB with die size of 592um*1130um including pads.","PeriodicalId":166878,"journal":{"name":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125752014","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-12-01DOI: 10.1109/ICCCAS.2018.8768958
Jinglei Wang, Y. Wan
This paper presents a new method to estimate the internal parameters of a camera based on two vertical lines. It does not require any actual size of calibration object and does not use the homograph matrix. In this method, we firstly use two vertical lines whose lengths can be any size, and then mark their intersection, endpoints, and midpoints in the image. And then our algorithm finds the subpixel coordinates of these points and makes the equations according to their vertical relationship. At last, all internal parameters can be obtained by solving the equations. Zhang's method is now the most popular calibration method. After obtaining the actual length of the checkerboard, he calculates the internal parameters of the camera by estimating the homograph matrix. In our method, the estimation of the homograph matrix is not needed, and the error caused by the estimation is avoided, so it is not necessary to measure the actual size of the checkerboard, which makes the calibration simpler.
{"title":"A New Camera Calibration Method Based on Two Vertical Lines","authors":"Jinglei Wang, Y. Wan","doi":"10.1109/ICCCAS.2018.8768958","DOIUrl":"https://doi.org/10.1109/ICCCAS.2018.8768958","url":null,"abstract":"This paper presents a new method to estimate the internal parameters of a camera based on two vertical lines. It does not require any actual size of calibration object and does not use the homograph matrix. In this method, we firstly use two vertical lines whose lengths can be any size, and then mark their intersection, endpoints, and midpoints in the image. And then our algorithm finds the subpixel coordinates of these points and makes the equations according to their vertical relationship. At last, all internal parameters can be obtained by solving the equations. Zhang's method is now the most popular calibration method. After obtaining the actual length of the checkerboard, he calculates the internal parameters of the camera by estimating the homograph matrix. In our method, the estimation of the homograph matrix is not needed, and the error caused by the estimation is avoided, so it is not necessary to measure the actual size of the checkerboard, which makes the calibration simpler.","PeriodicalId":166878,"journal":{"name":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","volume":"192 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121739801","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-12-01DOI: 10.1109/ICCCAS.2018.8768912
Donglin Wang, R. Sattiraju, H. Schotten
In recent decades, both the industry and the academy society are sparing no efforts to develop and standardize the Cellular-Vehicle-to-Everything (C-V2X) communication which is one of the prominent emerging services of the next generation of wireless network (5G). C-V2X communication is used for information exchange among the traffic participants with network-assisted which can reduce traffic accidents and improve traffic efficiency. And it is also the primary enabler for cooperative driving. But C-V2X communication has to meet different Quality of Service (QoS) requirements (e.g., ultra-high reliability (99.999%) and ultra-low latency). Guaranteeing a high-level reliability is a big challenge, the performance of C-V2X communication is heavily dependent on the channel model. Hence, the selection of channel models plays an important role in evaluating the performance of C-V2X communication. In this work, we analyze the C-V2X system performances under three different channel models – Two-Ray interference model, WINNER II channel model, and the 3rd Generation Partnership Project (3GPP) channel model applied to the same highway scenario. And we try to find out the reliable and practical channel model for different C-V2X applications according to the system performance characteristics of the three channel models. Moreover, in order to discover the effects of shadowing on the system performance, we study and compare the WINNER II model and 3GPP model with and without shadowing. In addition, a system-level simulator of the direct C-V2X communication on a highway scenario has been implemented and the simulation results can provide us insights on the performances of different channel models applied to the direct C-V2X communication.
{"title":"Performances of C-V2X Communication on Highway under Varying Channel Propagation Models","authors":"Donglin Wang, R. Sattiraju, H. Schotten","doi":"10.1109/ICCCAS.2018.8768912","DOIUrl":"https://doi.org/10.1109/ICCCAS.2018.8768912","url":null,"abstract":"In recent decades, both the industry and the academy society are sparing no efforts to develop and standardize the Cellular-Vehicle-to-Everything (C-V2X) communication which is one of the prominent emerging services of the next generation of wireless network (5G). C-V2X communication is used for information exchange among the traffic participants with network-assisted which can reduce traffic accidents and improve traffic efficiency. And it is also the primary enabler for cooperative driving. But C-V2X communication has to meet different Quality of Service (QoS) requirements (e.g., ultra-high reliability (99.999%) and ultra-low latency). Guaranteeing a high-level reliability is a big challenge, the performance of C-V2X communication is heavily dependent on the channel model. Hence, the selection of channel models plays an important role in evaluating the performance of C-V2X communication. In this work, we analyze the C-V2X system performances under three different channel models – Two-Ray interference model, WINNER II channel model, and the 3rd Generation Partnership Project (3GPP) channel model applied to the same highway scenario. And we try to find out the reliable and practical channel model for different C-V2X applications according to the system performance characteristics of the three channel models. Moreover, in order to discover the effects of shadowing on the system performance, we study and compare the WINNER II model and 3GPP model with and without shadowing. In addition, a system-level simulator of the direct C-V2X communication on a highway scenario has been implemented and the simulation results can provide us insights on the performances of different channel models applied to the direct C-V2X communication.","PeriodicalId":166878,"journal":{"name":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131253648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, a new method called the Capacitor-Charge-Balance and the Variable-Frequency-Control (CCB-VFC) for a single-inductor dual-outputs (SIDO) buck converter is proposed to achieve the fast-transient response and the low cross-regulation. A SIDO buck converter operating at continuous conduction mode (CCM) is taken as an example to analyze the operation when the load current steps up. The proposed method makes the unchanged load operate at the steady-state during the transient process to suppress the cross-regulation while the inductor current rises to a new steady-state rapidly to achieve the fast response. In order to verify the performance of the proposed method, simulation platform is built in the MATLAB/Simulink environment. Simulation results demonstrate that the CCB-VFC method guarantees the low cross-regulation for the SIDO buck converter in continuous conduction mode (CCM) and improves the transient performance.
{"title":"The Design of the Singe-Inductor Dual-Outputs DC-DC Buck Converter Based on the Capacitor-Charge-Balance and the Variable-Frequency-Control Method","authors":"Chao Huang, Daying Sun, Yu Yao, Ting Li, Zhiheng Wang, Wenhua Gu","doi":"10.1109/ICCCAS.2018.8769169","DOIUrl":"https://doi.org/10.1109/ICCCAS.2018.8769169","url":null,"abstract":"In this paper, a new method called the Capacitor-Charge-Balance and the Variable-Frequency-Control (CCB-VFC) for a single-inductor dual-outputs (SIDO) buck converter is proposed to achieve the fast-transient response and the low cross-regulation. A SIDO buck converter operating at continuous conduction mode (CCM) is taken as an example to analyze the operation when the load current steps up. The proposed method makes the unchanged load operate at the steady-state during the transient process to suppress the cross-regulation while the inductor current rises to a new steady-state rapidly to achieve the fast response. In order to verify the performance of the proposed method, simulation platform is built in the MATLAB/Simulink environment. Simulation results demonstrate that the CCB-VFC method guarantees the low cross-regulation for the SIDO buck converter in continuous conduction mode (CCM) and improves the transient performance.","PeriodicalId":166878,"journal":{"name":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124145362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-12-01DOI: 10.1109/ICCCAS.2018.8769320
Di Wu, Xuguang Liu, Jinda Zhu, Zhihong Yang, Zhuofei Yu, Jian Luo
Electronic systems and electrical systems usually use parallel VSC to increase drive power or power supply. Parallel VSC systems introduce additional circulation loop apart from 3-phase sequence circuit and circulation current thus appears. Based on modulation model of VSC and analysis of circulation flow path, circulation equivalent circuit of parallel VSC is obtained. The circulating voltage expression based on the BESSEL function is obtained by using VSC’s voltage of ac side to the dc pole. Considering the instantaneous power operation interval and circulation inhibition, system parameters design method of parallel VSC is studied. The influence degree of modulation depth, phase difference and carrier frequency deviation on circulation of parallel system are analyzed and main component is zero-sequence circulation. Finally, take switching frequency circulation as example, Simulation model of two-VSC parallel system based on dq decoupling closed-loop is established to analyze the operation transient characteristics. Two situations of same operating conditions and PWM carrier frequency deviation between two VSC are simulated respectively, simulation results show that system parameter design method proposed in this paper is rational. At the same time, an open-loop parallel VSC model under the same electrical parameters is established, and the trend of different parameter deviation on circulation is analyzed.
{"title":"Research on Main Parameters Design Method and Circulation Mechanism of Parallel VSC System","authors":"Di Wu, Xuguang Liu, Jinda Zhu, Zhihong Yang, Zhuofei Yu, Jian Luo","doi":"10.1109/ICCCAS.2018.8769320","DOIUrl":"https://doi.org/10.1109/ICCCAS.2018.8769320","url":null,"abstract":"Electronic systems and electrical systems usually use parallel VSC to increase drive power or power supply. Parallel VSC systems introduce additional circulation loop apart from 3-phase sequence circuit and circulation current thus appears. Based on modulation model of VSC and analysis of circulation flow path, circulation equivalent circuit of parallel VSC is obtained. The circulating voltage expression based on the BESSEL function is obtained by using VSC’s voltage of ac side to the dc pole. Considering the instantaneous power operation interval and circulation inhibition, system parameters design method of parallel VSC is studied. The influence degree of modulation depth, phase difference and carrier frequency deviation on circulation of parallel system are analyzed and main component is zero-sequence circulation. Finally, take switching frequency circulation as example, Simulation model of two-VSC parallel system based on dq decoupling closed-loop is established to analyze the operation transient characteristics. Two situations of same operating conditions and PWM carrier frequency deviation between two VSC are simulated respectively, simulation results show that system parameter design method proposed in this paper is rational. At the same time, an open-loop parallel VSC model under the same electrical parameters is established, and the trend of different parameter deviation on circulation is analyzed.","PeriodicalId":166878,"journal":{"name":"2018 10th International Conference on Communications, Circuits and Systems (ICCCAS)","volume":"138 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128611871","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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