The Modeling of HVDC Circuit Breakers for Small Time-step Real-time Simulation

Abstract

In the simulations of voltage source converter (VSC) based DC grids, fast protection schemes for overhead lines, such as traveling wave protection unavoidably require a small time step when simulating high voltage direct current (HVDC) circuit breakers. In order to present protection processes accurately and realize hardware-in-the-loop (HIL) simulation, this paper proposes a modeling method of HVDC circuit breakers for small time-step real-time simulation. After using the transmission line modeling method(TLM) to solve the arrester and constant impedance model of the switch, the admittance matrix of the HVDC breaker will keep constant, which reduces computing time greatly. A simplified HVDC breaker is used to interpret the modeling method. And a test circuit is implemented on a field programmable gate array (FPGA) board, on which efficient and accurate simulation results are obtained.