J. Kwon, Jinho Yoo, Jaeyong Lee, Tae-Hoo Kim, Changkun Park
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引用次数: 1
Abstract
This paper presents a sub-6 GHz dual-gate single-pole double-throw (SPDT) switch fabricated in a 0.5 μm GaAs pHEMT technology. All ports are matched by a single inductor which allows to achieve low insertion loss and high isolation in the operating frequency range of 3–5 GHz. Dual-gate technique and OFF-state voltage optimization were used to enhance linearity while reducing the insertion loss. The input and output return losses measured at 3–5 GHz were > 15 dB. The insertion loss was measured < 0.3 dB and isolation was > 32.7 dB at 3–5 GHz. At 3 GHz, the measurement result of the input 1-dB compression point (IP1dB) was higher than 34.2 dBm. The chip area of the proposed SPDT switch, including pads, is 0.97 × 0.86 mm2.