Design of a current mode 6-bit 100 MS/s flash A/D converter with 0.75 pJ/conv-lev FoM

I. Galdi, E. Bonizzoni, Franco Maloberti
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引用次数: 3

Abstract

The design of a low-power 6-bit flash A/D converter with state-of-the-art figure of merit for flash architectures is presented. The target resolution with the lowest power consumption is achieved by using the voltage-to-current conversion strategy. The sampling frequency is 100 MHz and the proposed converter is able to work with an input signal frequency very close to Nyquist rate. Considering that the analog and the digital supply voltages are 1.8 V and 0.9 V, respectively, the achieved figure of merit is equal to 0.75 pJ/conv.
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0.75 pJ/ lev FoM电流模式6位100ms /s闪存a /D转换器的设计
介绍了一种低功耗6位闪存a /D转换器的设计,该转换器具有最先进的闪存结构性能。通过使用电压-电流转换策略,实现了功耗最低的目标分辨率。采样频率为100mhz,所提出的转换器能够在非常接近奈奎斯特速率的输入信号频率下工作。考虑模拟电源电压为1.8 V,数字电源电压为0.9 V,实现的优值为0.75 pJ/conv。
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