{"title":"Combining advanced process technology and design for systems level integration","authors":"A. Hunter, C. Lau, J. Martin","doi":"10.1109/ISQED.2000.838879","DOIUrl":null,"url":null,"abstract":"Recent advances in process and integration are enabling systems level integration for numerous applications. The quality of the systems depends directly on the quality of the processes and effectiveness of the process integration, and on the quality of the designs and libraries employed, as well as on the completeness and accuracy of the models used to link the process and designs. Unit process and process module quality is ensured through the use of designed experimentation, margin analysis, and statistical capability measurement. The link between the processes and the libraries and designs is formed through such models as SPICE and interconnect, with quality implications associated with the extraction and implementation. GDSII algorithms to incorporate process specific post layout features such as OPC and fill patterns for CMP planarization are integrated into the CAD flow prior to final verification, reticle manufacturing and silicon prototyping. Foundry specific challenges in providing process and library elements include multiple design flows, tool providers and library suppliers. Examples of approaches to quality designs, processes and systems are presented using advanced cores and systems level integration.","PeriodicalId":113766,"journal":{"name":"Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2000.838879","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Recent advances in process and integration are enabling systems level integration for numerous applications. The quality of the systems depends directly on the quality of the processes and effectiveness of the process integration, and on the quality of the designs and libraries employed, as well as on the completeness and accuracy of the models used to link the process and designs. Unit process and process module quality is ensured through the use of designed experimentation, margin analysis, and statistical capability measurement. The link between the processes and the libraries and designs is formed through such models as SPICE and interconnect, with quality implications associated with the extraction and implementation. GDSII algorithms to incorporate process specific post layout features such as OPC and fill patterns for CMP planarization are integrated into the CAD flow prior to final verification, reticle manufacturing and silicon prototyping. Foundry specific challenges in providing process and library elements include multiple design flows, tool providers and library suppliers. Examples of approaches to quality designs, processes and systems are presented using advanced cores and systems level integration.