V. Carron, F. Nemouchi, Y. Morand, T. Poiroux, L. Hutin, M. Vinet, T. Billon, O. Faynot
{"title":"Metallic source and drain module for FDSOI MOSFETs applications","authors":"V. Carron, F. Nemouchi, Y. Morand, T. Poiroux, L. Hutin, M. Vinet, T. Billon, O. Faynot","doi":"10.1109/IWJT.2010.5474986","DOIUrl":null,"url":null,"abstract":"We report on the development of metallic source and drain module for FDSOI MOSFETs including lateral salicidation of the channel edges and dopant segregation technique. Metal barrier type (TiN or Ti/TiN), optimized doping conditions, controlled PtSi penetration below spacers and suitable cleaning of the silicide surface lead to very low specific contact resistivity values (down to 0.1Ωµm<sup>2</sup>). We thus demonstrate metallic source and drain pMOSFETs with promising electrical behavior suitable for high performance applications (Ion=345µA.µm<sup>−1</sup> and Ioff=30nA.µm<sup>−1</sup> at −s1V for 50nm gate length). Using a similar approach, we also demonstrate state-of-the-art nMOSFETs fabricated with not yet optimized Er and Yb salicidation processes.","PeriodicalId":205070,"journal":{"name":"2010 International Workshop on Junction Technology Extended Abstracts","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Workshop on Junction Technology Extended Abstracts","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWJT.2010.5474986","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
We report on the development of metallic source and drain module for FDSOI MOSFETs including lateral salicidation of the channel edges and dopant segregation technique. Metal barrier type (TiN or Ti/TiN), optimized doping conditions, controlled PtSi penetration below spacers and suitable cleaning of the silicide surface lead to very low specific contact resistivity values (down to 0.1Ωµm2). We thus demonstrate metallic source and drain pMOSFETs with promising electrical behavior suitable for high performance applications (Ion=345µA.µm−1 and Ioff=30nA.µm−1 at −s1V for 50nm gate length). Using a similar approach, we also demonstrate state-of-the-art nMOSFETs fabricated with not yet optimized Er and Yb salicidation processes.
我们报告了FDSOI mosfet的金属源极和漏极模块的发展,包括通道边缘的横向盐化和掺杂偏析技术。金属屏障类型(TiN或Ti/TiN)、优化的掺杂条件、控制PtSi在间隔物下方的渗透以及对硅化物表面的适当清洗导致非常低的比接触电阻率值(低至0.1Ωµm2)。因此,我们展示了具有良好电学性能的金属源极和漏极pmosfet,适用于高性能应用(离子=345µA)。µm−1,Ioff=30nA。µm−1 at - s1V,栅长50nm)。使用类似的方法,我们还展示了尚未优化的Er和Yb盐化工艺制备的最先进的nmosfet。