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2010 International Workshop on Junction Technology Extended Abstracts最新文献

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Nickel silicide formation on Si(110) substrate 在Si(110)衬底上形成硅化镍
Pub Date : 2010-05-10 DOI: 10.1109/IWJT.2010.5474895
Xiao Guo, Xiao-Rong Wang, Yu-Long Jiang, G. Ru, Bingzong Li
Nickel silicide formation on Si(110) substrate is investigated in this paper. Comparing with the samples fabricated on Si(100) substrate, it is revealed that a higher annealing temperature is required for NiSi formation on Si(110) substrate. X-ray diffraction and atomic force microscopy were employed for further material analysis. NiSi/Si(110) Schottky contacts were also fabricated for electrical characteristics evaluation. The formation kinetics for nickel silicidation on Si(110) substrates was also discussed in this paper.
本文研究了硅(110)衬底上硅化镍的形成。与在Si(100)衬底上制备的样品相比,发现在Si(110)衬底上形成NiSi需要更高的退火温度。采用x射线衍射和原子力显微镜对材料进行进一步分析。NiSi/Si(110)肖特基触点也用于电特性评估。本文还讨论了镍在Si(110)基体上硅化的形成动力学。
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引用次数: 0
Sidewall resistance reduction for FinFETs by B2H6/Helium Self-Regulatory Plasma Doping process B2H6/氦自调节等离子体掺杂工艺降低finfet的侧壁电阻
Pub Date : 2010-05-10 DOI: 10.1109/IWJT.2010.5474972
Y. Sasaki
The Self-Regulatory Plasma Doping (SRPD) technique with B2H6/Helium gas plasma for PMOS FinFETs has been aggressively developed. Low resistance of the side surface of fins has been successfully demonstrated. The obtained value of the sheet resistance of the side surface is 910 ohm/sq. This sheet resistance is lower than International Technology Roadmap for Semiconductors 2009 Edition (ITRS 2009) required value of maximum drain extension sheet resistance for multi-gate MPU/ASIC (PMOS) at year 2015. The SRPD process reported in this paper will be the excellent doping method for PMOS FinFETs extension for 22 nm node and beyond.
B2H6/氦气等离子体用于PMOS finfet的自调节等离子体掺杂(SRPD)技术得到了积极的发展。成功地证明了翅片侧表面的低阻力。得到的边面片电阻值为910欧姆/平方。该片电阻低于国际半导体技术路线图2009版(ITRS 2009)在2015年要求的多栅极MPU/ASIC (PMOS)的最大漏极扩展片电阻值。本文报道的SRPD工艺将成为PMOS finfet扩展到22 nm及以上节点的优良掺杂方法。
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引用次数: 1
Carrier activation in cluster boron implanted Si 簇硼注入Si中的载流子活化
Pub Date : 2010-05-10 DOI: 10.1109/IWJT.2010.5474917
H. Onoda, N. Hamamoto, T. Nagayama, M. Tanjyo, S. Umisedo, N. Maehara, Y. Kawamura, Y. Nakashima, M. Hashimoto, H. Yoshimi, S. Sezaki, K. Kawakami, J. Reyes, S. Prussin
Boron retained dose and carrier activation after spike RTA in Cluster B18+ (Octadecaborane : B18H11+) implanted Si have been investigated comparing with BF2 beamline implanted Si. The retained dose estimated by SIMS depth profile integration is higher in B18 samples. In the same implant set dose, carrier concentrations in B18 samples show almost twice compared with BF2 samples although mobilities are almost the same in both samples. This means that activation ratio of B18 sample is much higher compared with that of BF2 sample. This is one of the advantages of cluster ion implantation.
研究了B18+(十八硼烷:B18H11+)簇注入Si和BF2束线注入Si后,硼的保留剂量和RTA后载体活化情况。SIMS深度剖面积分估计的B18样品的保留剂量较高。在相同的植入剂量下,B18样品中的载流子浓度几乎是BF2样品的两倍,尽管两者的迁移率几乎相同。这意味着B18样品的活化比BF2样品高得多。这是簇离子注入的优点之一。
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引用次数: 2
Advanced boron-based ultra-low energy doping techniques on ultra-shallo junction fabrications 超浅结制造中硼基超低能掺杂先进技术
Pub Date : 2010-05-10 DOI: 10.1109/IWJT.2010.5474885
S. Qin, Y. J. Hu, A. Mcteer
The focus of this paper is a comparative study of the advanced boron-based ultra-low energy (ULE) doping techniques on ultra-shallow junction (USJ) fabrications, including beam-line atomic 11B implant, BF2, B18H22, C2B10H12 molecular implants, cluster B implant, and B2H6 and BF3 PLAD implants. It has been found that B2H6 PLAD and B18H22 molecular implants demonstrate the best RS-xj and abruptness characteristics. Beam-line BF2 implant shows poor RS-xj characteristics due to its serious RIE effect by F species. Cluster B implant shows the worst RS-xj characteristics and a very rough surface. Both are attributed to its serious self-sputtering effect because of its much larger and heavier ion species although further optimization may lead to improvement.
本文的重点是比较研究了先进的硼基超低能(ULE)掺杂技术在超浅结(USJ)制造中的应用,包括束线原子11B植入物、BF2、B18H22、C2B10H12分子植入物、簇B植入物以及B2H6和BF3 PLAD植入物。发现B2H6 PLAD和B18H22分子植入物具有最佳的RS-xj和陡度特性。束线BF2植体受F种RIE影响严重,RS-xj特性较差。簇B种植体的RS-xj特征最差,表面非常粗糙。两者都归因于其严重的自溅射效应,因为它的离子种类更大、更重,尽管进一步的优化可能会导致改进。
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引用次数: 3
Advances in molecular implant technology 分子植入技术进展
Pub Date : 2010-05-10 DOI: 10.1109/IWJT.2010.5474978
W. Krull
Molecular implant (aka Cluster Implant) has been established as an alternative for boron and carbon implants in advanced technology applications. The unique features of molecular implant (especially self-amorphization and low EOR damage) enable the formation of aggressively shallow USJ with very high quality. Recent results using 300eV monomer equivalent implant energies will show junctions of 10nm, with low resistance. Experiments include the use of spike, millisecond and microsecond anneals, all with excellent results. In addition, the influence of carbon co-implants are shown to be significant even for these advanced implant and anneal processes. The variety of available carbon molecules will be discussed, focusing on the Si:C stress application. The requirement for stressor layer thickness drives the choice of carbon molecule and stressor layers up to 60nm in thickness will be discussed. In addition, the interaction between the carbon and dopant atoms will be shown to create a process window of moderate concentrations where good dopant junctions and effective stress layers can be formed.
分子种植体(又名簇种植体)已成为硼和碳种植体在先进技术应用中的替代方案。分子植入物的独特特性(特别是自非晶化和低EOR损伤)使得形成具有侵略性的浅USJ具有非常高的质量。最近的研究结果显示,使用300eV的单体等效植入能量将显示10nm的结,具有低电阻。实验包括使用尖峰,毫秒和微秒退火,都有很好的结果。此外,即使对于这些先进的植入和退火工艺,碳共植入的影响也是显著的。各种可用的碳分子将被讨论,重点是Si:C应力应用。对应力源层厚度的要求驱动了碳分子和应力源层厚度达到60nm的选择。此外,碳和掺杂原子之间的相互作用将显示出创建一个适中浓度的过程窗口,在此过程窗口中可以形成良好的掺杂结和有效的应力层。
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引用次数: 0
Improved radiation response of PDSOI LBBC BUSFET 改进的PDSOI LBBC总线效应管辐射响应
Pub Date : 2010-05-10 DOI: 10.1109/IWJT.2010.5474907
J. Bi, C. Hai, Zhengsheng Han
Partially Depleted Silicon-On-Insulator (PDSOI) Low Barrier Body Contact (LBBC) Body Under Source FET (BUSFET) is proposed by using ISE TCAD 2D process and device simulation. The difference between LBBC BUSFET and normal BUSFET is given. LBBC BUSFET shows improved resistance to radiation over normal BUSFET, thanks to lower body contact resistance and reduced junction barrier height. PDSOI LBBC BUSFET is more suitable for radiation hard applications.
利用ISE TCAD 2D工艺和器件仿真,提出了部分耗尽绝缘体上硅(PDSOI)低势垒体接触(LBBC)源下体FET (BUSFET)。给出了LBBC型总线场效应管与普通总线场效应管的区别。由于较低的体接触电阻和降低的结势垒高度,LBBC总线场效应管显示出比普通总线场效应管更好的抗辐射能力。PDSOI lbbcbusfet更适合辐射硬应用。
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引用次数: 0
Advanced junction formation for sub-32nm logic devices 用于32nm以下逻辑器件的先进结形成
Pub Date : 2010-05-10 DOI: 10.1109/IWJT.2010.5474970
S. Deshpande, A. Ozcan, D. Wall, Eunha Kim, O. Gluschenkov
This paper is meant to be a general overview of recent advances in new processes and process tooling (implant and anneal) for advanced junction formation. Also included are details of impact of novel implant processes, such as cold implant and pre-amorphization (PAI) implants on Nickel Silicide (NiSi) formation. We will also discuss subtle impacts of wafer temperature during ion implantation on channel stress retention and shallow junctions in today's advanced device nodes.
这篇论文的目的是对新工艺和工艺工具(植入和退火)的最新进展进行概述。还包括新植入工艺的影响,如冷植入和预非晶化(PAI)植入对硅化镍(NiSi)形成的细节。我们还将讨论离子注入过程中晶圆温度对当今先进器件节点中通道应力保留和浅结的微妙影响。
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引用次数: 0
A highly scalable Π-shaped source/drain quasi-SOI MOS transistor 一个高度可扩展Π-shaped源/漏准soi MOS晶体管
Pub Date : 2010-05-10 DOI: 10.1109/IWJT.2010.5474897
Y. Eng, Jyi-Tsong Lin, Yi-Hsuan Fan, Yu-Che Chang, Kuan-Yu Lu, Cheng-Hsien Chen, Chih-Hsuan Tai
This paper presents a highly scalable Π-shaped source/drain (Π-S/D) quasi-silicon-on-insulator (SOI) MOSFET and summarizes its preliminary characteristics compared with the recessed S/D SOI MOSFET and international technology roadmap for semiconductors (ITRS) roadmap values. SiGe-Si epitaxial growth, Si and SiGe etching, growth of epitaxial Si, and selective SiGe removal are used to form the Π-S/D in the quasi-SOI fabrication that no additional lithography mask is needed due mainly to the isolation-last-formed structures. Hence the advantages of the proposed quasi-SOI over conventional one, in device fabrication, are that the new quasi-SOI process can not only be completely compatible with the standard CMOS process, but can also achieve single-crystal silicon S/D regions. The three-dimensional numerical simulations carried out prove that a modified Π-S/D quasi-SOI transistor can meet ITRS requirements for high-performance devices in the 20 nm technology node and it means that the potential for planar bulk technology can still be used continuously.
本文提出了一种高度可扩展的Π-shaped源/漏极(Π-S/D)准绝缘体上硅(SOI) MOSFET,并与嵌入式S/D SOI MOSFET和国际半导体技术路线图(ITRS)路线图值进行了比较,总结了其初步特性。通过SiGe-Si外延生长、Si和SiGe蚀刻、外延Si生长和选择性SiGe去除,在准soi制造中形成Π-S/D,由于隔离最后形成的结构,不需要额外的光刻掩膜。因此,在器件制造中,与传统的准soi工艺相比,所提出的准soi工艺不仅可以与标准的CMOS工艺完全兼容,而且还可以实现单晶硅S/D区域。三维数值模拟结果表明,改进后的Π-S/D准soi晶体管可以满足20 nm技术节点上高性能器件的ITRS要求,这意味着平面本体技术的潜力仍然可以持续发挥。
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引用次数: 0
Vacancy-type defects in ultra-shallow junctions fabricated using plasma doping studied by positron annihilation 用正电子湮灭研究了等离子体掺杂制备的超浅结中的空位型缺陷
Pub Date : 2010-05-10 DOI: 10.1109/IWJT.2010.5474912
A. Uedono, K. Tsutsui, S. Ishibashi, Hiromichi Watanabe, S. Kubota, K. Tenjinbayashi, Y. Nakagawa, B. Mizuno, T. Hattori, H. Iwai
Vacancy-type defects in plasma immersion B-implanted Si were probed by a monoenergetic positron beam. A positron annihilates with an electron and emits two 511 keV γ-quanta. Doppler broadening spectra of the annihilation radiation were measured and compared with spectra calculated using the first-principles calculations. For the as-doped sample, the vacancy-rich region was found to be localized within 0–10 nm from the surface, and the major defect species were determined to be divacancy-B complexes. After spike rapid thermal annealing at 1075°C, those complexes were annealed out, and turned to B clusters such as icosahedral B12 distributed between 4 nm and 32 nm from the surface. We will demonstrate that that the positron annihilation technique is sensitive to point defects in shallow junctions formed on Si substrates without influence of B atoms located in the substitutional site.
用单能正电子束探测等离子体浸没b注入硅中的空位型缺陷。一个正电子与一个电子湮灭并释放出两个511kev γ-量子。测量了湮灭辐射的多普勒展宽光谱,并与用第一性原理计算得到的光谱进行了比较。对于掺杂样品,发现富空位区位于距离表面0-10 nm范围内,并且确定主要缺陷种为空位- b配合物。经过1075℃的尖峰快速退火后,这些配合物被退火出来,变成分布在距离表面4 ~ 32 nm之间的B团簇,如二十面体B12。我们将证明,正电子湮灭技术对硅衬底上形成的浅结中的点缺陷很敏感,而不受位于取代位的B原子的影响。
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引用次数: 2
Performance estimations of gate-all-around silicon nanowire FETs with asymmetric barrier heights at source/drain 源极/漏极势垒高度不对称栅极全硅纳米线场效应管的性能评估
Pub Date : 2010-05-10 DOI: 10.1109/IWJT.2010.5474964
J. Pu, Lei Sun, R. Han
The performance of n-channel gate-all-around silicon nanowire FETs with asymmetric barrier heights at source/drain (ASB-SiNW-FET) was simulated. Some impact factors are studied. The results suggest that the drain current and threshold voltage are mainly determined by source-side barrier height (S-SBH). Increasing S-SBH or decreasing nanowire radius can optimize sub-threshold slope, while decreasing S-SBH can enhance the drain current and suppress the fluctuation of threshold voltage.
模拟了源极/漏极势垒高度不对称的n沟道栅极-全硅纳米线场效应管(ASB-SiNW-FET)的性能。研究了一些影响因素。结果表明,漏极电流和阈值电压主要取决于源侧势垒高度(S-SBH)。增大S-SBH或减小纳米线半径可以优化亚阈值斜率,减小S-SBH可以增强漏极电流,抑制阈值电压的波动。
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引用次数: 0
期刊
2010 International Workshop on Junction Technology Extended Abstracts
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