Developments of FIWLP/WLCSP technology based on Enhanced Dielectric Material and optimized design options

Abstract

WLP has been a gradually adopted by the industry during the last years due to its unique characteristics regarding package size and height, package electrical and thermal characteristics and cost. As one of the earlier formats of this wafer level packaging technology, FIWLP is actually its main version with several WLCSP products in HVM since several years, and being adopted in more and more mobile devices. NANIUM, S.A, as a major WLP assembly and test services provider, has been gradually enlarging its WLP capabilities also for FIWLP / WLCSP products. With its recent introduction of an "Enhanced Dielectric Material for improved reliability performance" (ref. ECTC2014 [9]) for its FOWLP/eWLB technology and following qualification also for FIWLP/WLCSP, NANIUM demonstrated a superior package and board level performance on all its WLP technologies. This paper will describe the different developments that have been carried for FIWLP/WLCSP technology regarding BLR and cost reduction. Several examples of different test vehicles designed and tested to demonstrate such developments will be reviewed like comparisons between 3Mask and 4 Mask process; between 0.4mm and 0.35mm bump pitch, and other design/process/material variations. Finally this paper will also share an outline of actual and future developments and paths regarding simplification of its process flow; reduction of its BOM cost and improvement of its quality and yield.