Logic analysis and optimization with quick identification of invariants through one time frame analysis

Abstract

We show a way to extract inductive-invariant from sequential circuits by analyzing only one time frame. The extraction problem is formulated with Quantified Boolean Formula which says if some relation is satisfied on the inputs coming from subsets of flipflops, the same relation must be satisfied on the outputs going to those flipflops. The QBF problem can be solved by repeatedly applying SAT solvers, which generates complete sets of test vectors for the identification of the invariant as byproduct. We show on ITC99 benchmark circuits that invariants on control parts of the circuits can be easily extracted from netlist descriptions by guessing the flipflops in the control parts from their names, even if we do not understand the behaviors that the descriptions indicate. The extracted inductive-assertions show super sets of reachable states, and so can be used for logic optimization. We show that significant further optimizations such as 10-50% further area reductions are observed in the ISCAS89 benchmark circuits by utilizing subsets of unreachable states from the all zero initial state as external don't cares for the combinational parts.