GaAs Junctionless FinFET Using High-k Dielectric for High-Performance Applications

Abstract

This paper proposes GaAs junctionless (JL)-FinFET for high-performance applications. Results are so obtained and compared with conventional JL-FinFET. FinFET is designed using the metal gate and using Si3N4 as a spacer between gate and source/drain and using high-k BOX. Output and input characteristics are compared. GaAs JL-FinFET is found to provide lower leakage current. Further, potential inside the device is studied which show decrease in potential in the channel region in off state. In energy band diagram, higher difference is observed between Fermi and conduction level showing less conduction in off state. Electron charge density inside the device is also studied which shows the depletion of majority charge carrier concentration in off state. FinFET is being used to design SRAM as it is found to bring read stability and is found to have less parasitic capacitance, less leakage current and higher switching speed.